>> T4: 3.3 DMIPS/MHz * 1800 MHz = 5940 DMIPS

> Freescale insists that e6500 delivers 6.0DMIPS/MHz.
> But we agree that it's only when hyperthreading (SMP) is used?

Yes, as this is exactly what Freescale says. In June at FTF, they revealed that a single e6500 thread delivers 3.3 DMIPS/MHz. See there:

https://morph.zone/modules/newbb_plus/viewtopic.php?forum=3&topic_id=7001&start=743

And due to the fact that a thread (or 'virtual core' in Freescale speak) is not a full core it's only logical that a single thread running delivers better than half the performance of both threads running in SMT mode.

> To me it seems that T2080 could be pretty good PA6T replacement.

Yes, from a desktop computing point of view, the only drawback of the T2080 compared to the T4240/T4160 is the lower number of SerDes lanes available (2x8 vs. 2x16/2x12). On the other hand, the T2080 should be way cheaper than the T4 chips. And we should take into account that the bandwidth per SerDes lane of the QorIQ T2/T4 is quadruple that of PA6T's bandwidth per SerDes lane.

Reminder:

> Hyperionmp says:
> "The way in which it will be implemented however is already clearly defined
> and was subject to peer review by other developers. Obstacles to an
> efficient implementation were removed (e.g. the use of Forbid) and replaced
> in many OS components over the years (e.g. DOS). The foundation for
> SMP support was put in place, a clear picture exists what needs to be done
> to accomplish it and how. I'm willing to take a bet that it won't take 2 years ;)"
> http://amigaworld.net/modules/newbb/viewtopic.php?topic_id=34171&forum=33&start=40#627520

Halftime :-)

Don't forget the last sentence in that posting.

Quote:

That gives them an out to extend when SMP will be finished, by saying that they have been working on anything else that is "more desireable".

As an owner of an X1000, I am hoping that they will finish their implementation of OS4.x SMP, so I can take advantage of both cores on my PA6T CPU.

[ Edited by amigadave 04.09.2012 - 01:32 ]

> the last sentence in that posting [...] gives them an out to extend
> when SMP will be finished, by saying that they have been working on
> anything else that is "more desireable".

I understand "something better" in this context as meaning "something better for leveraging the yet unused core(s) than SMP" (like for instance bound multiprocessing (BMP), which I'd say isn't really better than SMP but might be easier to implement). But maybe you're right and he literally means "anything else", which might even be a new icon set ;-)

Another thing in the way could be a (400mhz) netbook that needs heavy tweaking in SW to make it usable...

@KimmoK,
Quote:

Exactly what I meant.

They could use any excuse for the delay in implementing SMP for OS4.x.

It won't bother me, I have not worried about when features of OS4.x are released, or when OS4.2 will be finished, or even what OS4.2 will include when it is released. Just like I don't get worried about when the next version of MorphOS will be finished and what it will include. I do have some preferences about what I would like to see included in the next version of MorphOS3.x, or OS4.x, but I have no idea if what I want to see included is even being worked on yet.

I don't understand users who complain about what should be included next, or when a release should be finished. Even if I have things I wish were already finished and released, there is no point in getting worked up about any of it, so I just try to enjoy what is released now.

When OS4.2 gets here, I will enjoy what ever it includes, as long as it is an improvement over what I have now. It is only when new OS versions seem to go backwards by breaking things in the OS that I use often, or becoming noticeably slower that would cause me to lose interest, like MacOSX10.4.11 to MacOSX10.5 seemed to do in a few ways. Unfortunately, there are many MacOSX programs that only run on MacOSX10.5 and will not run on 10.4.

[ Edited by amigadave 05.09.2012 - 15:11 ]

>"bound multiprocessing"

Had to doa little research on the one.
Luckily there were some fairly easy to understand document on QNX support sites.
Interesting idea.

Update:

>> Is there a chance to order a X1000 in the future?

> I very much think so, else the "First Contact" systems
> should better be named "Last Contact" systems ;-)

"The current X1000 batch (Third batch) may be the last production acording to Trevor. A new more commercially viable design to follow."
http://amigaworld.net/modules/newbb/viewtopic.php?topic_id=36690&forum=2&start=20#685471

If that is true the current 2nd "First Contact" batch (= 3rd batch in total) is really the "Last Contact" batch.

On the other hand, Trevor wrote:

"Additional production runs will be scheduled should demand continue to exceed the supply."
http://blog.a-eon.biz/blog/?p=1252

Edit:
The video of Trevor's AmiWest 2012 presentation (direct link, Youtube) confirms what has been reported from the show:

"We're on the last production run now. [...] We're on our 3rd production run, which will probably be our last production run. [...] This is the last batch."

[ Edited by Andreas_Wolf 20.11.2012 - 23:19 ]

Andreas_Wolf,
Quote:

Yeah, bring on the Qorlq based board!

Well someone else obviously thinks PowerPC is still useful:

http://www.eetimes.com/electronics-news/4399118/Startup-plugs-Power-chips-into-energy-efficient-servers

> Well someone else obviously thinks PowerPC is still useful:
> http://www.eetimes.com/electronics-news/4399118/Startup-plugs-Power-chips-into-energy-efficient-servers

From that article:

"Along with IBM, Servergy is the only company currently making Power-based servers."

There has always been Hitachi's SR series using IBM POWER chips:

- SR16000 with POWER6 and POWER7
- SR11000 with POWER4 and POWER5

I've been under the impression that these machines are built by Hitachi around the POWER chips they obtain from IBM. Or maybe these are just relabelled IBM machines?

"It’s not clear whether Servergy designed its own Power processor or is using an off-the-shelf chip. [...] analysts said they are unaware of any company making merchant Power chips for servers. One possibility is the company could be using a chip derived from an existing IBM chip design."

This is interesting. I found an Oracle blog article from a month ago stating:

"The first system I'd like to tell you about is a really cool 8 core Power Architecture Hyper-Efficient Enterprise Server from a company in Dallas called Servergy."

And from Servergy's Principal Software Engineer Ben Collins' blog, also one month ago:

"The company I've been gainfully employed with for the past 1.5 years seems to be using something quite different than your grandmother's Power chip. Not quite the behemoth of the IBM Power7 iron (in size nor noise), but not the wussy of your old PowerMac neither. We're talking multiway SoCs with full floating-point running at a fraction of the wattage of just about anything else on the market. Add with it full hardware virtualization (via KVM), and you begin to see where in the market this is headed."

No more specific details than "8 core" and that it's not IBM POWER given unfortunately. I have a feeling that it could be a QorIQ chip, judging from Ben Collins' Freescale-focused comments here and there, as well as from his personal development repository.
Digging somewhat deeper and searching for his development mailing list postings from the last few months answers the question I think:

https://lkml.org/lkml/2012/2/27/237
http://lists.gnu.org/archive/html/qemu-ppc/2012-05/msg00243.html
https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098255.html
https://lists.ubuntu.com/archives/kernel-team/2012-June/020738.html
https://lists.ubuntu.com/archives/kernel-team/2012-June/020741.html
https://lists.ubuntu.com/archives/kernel-team/2012-June/020655.html
https://lists.ubuntu.com/archives/kernel-team/2012-June/020693.html
https://lists.ubuntu.com/archives/kernel-team/2012-June/020735.html
https://lists.ubuntu.com/archives/kernel-team/2012-November/022652.html
https://lists.launchpad.net/ubuntu-powerpc/msg00066.html
https://lists.launchpad.net/ubuntu-powerpc/msg00073.html

And the most revealing one regarding adding e500mc support to Ubuntu's Linux kernel:

"Our company is in talks to become a full partner with Canonical, so I suspect this makes it more of an official offering than anything else. Also, I am being paid to do community work on this kernel and maintain it fully. [...] Also, this line of processors has a large community base. Most PowerPC developers have similar machines (benh)."
https://lists.ubuntu.com/archives/kernel-team/2012-June/020733.html

In conclusion, my guess is: It's Freescale's 32-bit QorIQ P4080 chip (8 e500mc cores), so nothing to write home about and in my opinion a rather questionable choice for a server platform.

[ Edited by Andreas_Wolf 24.12.2012 - 11:57 ]

> if his investment so far has been $100,000 to $200,000 US dollars,
> I doubt he is charging enough to recoup all of that investment already

"Trevor said that it cost over US$400,000 to develop the X1000."
http://amigaworld.net/modules/newbb/viewtopic.php?topic_id=36690&forum=2&start=80#685861

More info from Trevor's AmiWest 2012 presentation (direct link, Youtube):

"It's all a matter of scale. If I could build 10,000 units, the NRE (non-recurring engineering) costs would be 5 GBP (8 USD) a board, 8 USD a system. That's nothing. If you build 1000 units that's now 10 times. If you build 100 units that's now 10 times again. So, someone's got to eat that non-recurring engineering costs. On the X1000 I'm eating it, because I wanted to produce the system. On the next systems [...], we're building that into the price, assuming that we sell a certain number of units. And that will govern the price."

I personally don`t understand the fuss over SMP. The ability to spawn an asynchronous process on the other core with it`s own memory space would almost as useful, although my knowledge is limited to scientific computing.

AFAIU SMP benfits from the fact that the task scheduler just balances the tasks between available cores itself and actual programs don't need to be SMP aware. The scheduler schedules taks and threads to the cores. On AMP only those applications benefit from additional cores that explicitly are written for multi core processing. Probably no big deal for new multithreaded programs, but old programs will utilize the master core only.

Quote:

Looks like I'll be happily proved wrong: 3 months! (potentially less than a year from that post)

[ Edited by boot_wb 02.11.2012 - 02:29 ]

@boot_wb,

Wow! That is some quote you dug up on yourself regarding how long it would take to port to the G5.

3 months is a lot different than 4 years, but then the bounty is only for porting to one specific model of the G5 PowerMac, which might work on more models of the G5 PowerMac, or might not. Since most of the work probably was already done when the "Proof of Concept" was done a few years ago, there is less work to do now, to get the port completed.

I am not going to go searching through all of my old posts to see what my estimate(s) were of how long I thought it would take to port to the G5, because I am sure any estimate I gave probably would have included more than a port to just one model.

I am just happy that this one port is happening, and there is a chance that it will work on my dual 2.7GHz G5 PowerMac tower, even though I would keep my G5 just to run MacOSX Leopard & Final Cut Studio even if it never runs any version of MorphOS3.x. At least now there is a chance that I will be able to run MorphOS3.x on my dual 2.7GHz G5 PowerMac.

> 3 months is a lot different than 4 years

Since the 3-months figure is what it is supposed to take not from now but from when the porting starts, I think it's more fair to compare it to boot_wb's 2-year estimate. Still a big difference, of course.

> Since most of the work probably was already done when the "Proof of
> Concept" was done a few years ago, there is less work to do now, to
> get the port completed.

I think this has already been taken into account in his original estimate.

Update:

>> Well someone else obviously thinks PowerPC is still useful:
>> http://www.eetimes.com/electronics-news/4399118/Startup-plugs-Power-chips-into-energy-efficient-servers

> I found an Oracle blog article from a month ago stating:
> "The first system I'd like to tell you about is a really cool 8 core Power Architecture
> Hyper-Efficient Enterprise Server from a company in Dallas called Servergy."

Seems that Servergy has another platform in the works called P-Cubed with a yet unnamed "Dual Core Power System on Chip (SOC)":

http://www.servergy.com/wp-content/uploads/2012/12/P-Cubed.jpg
http://www.linux.com/images/stories/714/P-Cubed.jpg
http://www.linux.com/news/enterprise/high-performance/147-high-performance/659106-servergy-announces-linux-on-power-enterprise-development-platform
http://www.servergy.com/news.html

What can be seen from the board layout is that at least GbE, USB and HDMI come from the SoC itself.

Addendum:

>> It's simple really.

> Indeed it is:
> 1. The X1000 exists.
> 2. An unknown to us number of X1000 units was available for sale.
> 3. All of those X1000 units available for sale so far have been purchased.

In his AmiWest 2012 presentation (direct link, Youtube), Trevor kind of reveals that there may currently be 400 to 500 X1000 owners. Whether this is meant to include those buyers from the current batch who still have to get their machine (supposed to be delivered until January 2013 at the latest) is unknown to me.

Update:

> Seems that Servergy has another platform in the works called P-Cubed
> with a yet unnamed "Dual Core Power System on Chip (SOC)":
> http://www.servergy.com/wp-content/uploads/2012/12/P-Cubed.jpg
> [...]
> What can be seen from the board layout is that at least GbE, USB
> and HDMI come from the SoC itself.

More information:

http://ben-collins.blogspot.com/2012/11/servergy-announces-new-powerpc.html

From there:

"The platform is geared toward making modern Power systems available to developers for a fraction of the cost of full fledged server systems (Servergy's primary market). While the board is aimed at increasing the ecosystem and community around Linux-on-Power, the pricing is sure to attract hobbyists and students as well. While Servergy did not say the exact price, they are aiming at a sub-$200 system."

Update:

> Seems that Servergy has another platform in the works called P-Cubed
> with a yet unnamed "Dual Core Power System on Chip (SOC)":
> http://www.servergy.com/wp-content/uploads/2012/12/P-Cubed.jpg
> [...]
> What can be seen from the board layout is that at least GbE, USB and
> HDMI come from the SoC itself.

More information:

"The platform is geared toward making modern Power systems available to developers for a fraction of the cost of full fledged server systems (Servergy's primary market). While the board is aimed at increasing the ecosystem and community around Linux-on-Power, the pricing is sure to attract hobbyists and students as well. While Servergy did not say the exact price, they are aiming at a sub-$200 system."
http://ben-collins.blogspot.com/2012/11/servergy-announces-new-powerpc.html

Ben Collins says in a comment on the P-Cubed:

"We are definitely aiming this to be a low-end version of our CTS product line."

As I said I believe the CTS-1000 to feature Freescale's e500mc-cored QorIQ P4080 SoC. However, I'm not aware of any dual-e500mc chip. My feeling is that at the announced low price it should be some e500v2-cored chip (QorIQ P1 or P2, probably P1022 with DIU due to HDMI traces coming from the chip).

Addendum:

> My feeling is that at the announced low price it should be some e500v2-cored chip
> (QorIQ P1 or P2, probably P1022 with DIU due to HDMI traces coming from the chip).

On another site someone says he "saw that they use a P1025 chip", i.e. an e500v2-based chip without DIU. Where he saw that I've no idea though.

Update:

>> there's an interesting tweet by IBM from June 2011 which seems to confirm that
>> the Wii U actually uses the very same POWER7 *chip* (not just the same core) as
>> IBM's Watson computer, which would mean an eight-core POWER7 chip. I find that
>> very hard to believe.

> If the recent information about Wii U's CPU being a three-core chip is true, this
> would mean that IBM purposely spread false information in June 2011. There's not
> even a POWER7 chip with 3 cores (4 cores being the smallest variant). And from
> last month two other tweets from the same IBM twitter account that, citing an
> old Engadget article, suddenly read way more vague and contradict the older tweet
> (same chip as in Watson vs. custom chip):
> http://twitter.com/IBMWatson/status/231902074890248192
> http://twitter.com/IBMWatson/status/240241146213842944

2 months ago, IBM reinforced the claim that the Wii U processor was based on POWER7:

http://twitter.com/IBMWatson/status/247460688283463680

Only few days later, IBM finally admitted that their claim that the Wii U processor was a POWER7 chip of some sort or somehow derived from POWER7 was a misinformation:

http://twitter.com/IBMWatson/status/248820933618442240
http://twitter.com/IBMWatson/status/248929547842641920

Love being made to look foolish repeating dumb rumors only to find out that the Wii U's processor is a warmed over three core version of the last processor.

Makes the rumors about Power 8 look less likely.

> Love being made to look foolish repeating dumb rumors

Always depends on who started the rumour in the first place. In this case this was no less a figure than IBM itself. So if IBM spreads misinformation about their own product, taking it for truth is not a foolish act in my opinion.

> Makes the rumors about Power 8 look less likely.

You mean the rumour about future POWER chips with Cell SPE-like units?