Open Power
  • Yokemate of Keyboards
    Yokemate of Keyboards
    Andreas_Wolf
    Posts: 11719 from 2003/5/22
    From: Germany
    Addendum:

    >> Power ISA "3.0C"? Never heard of that. Does anybody have a link to that "3.0C" spec?

    > some mention of Power ISA 3.0C in slides from ICS in June 2020
    > (page 2): [...] (further mentions on pages 3 and 6)
    > Respective presentation: https://www.youtube.com/watch?v=0zIwLCnIuqg

    Revised presentation from OpenPOWER Summit NA 2020:
    https://www.youtube.com/watch?v=ZGvEpd4vNK0

    Inexplicably, the occurences of "3.0c"/"3.0C" on pages 2/3 got replaced by "3.0", which is of course plain wrong as neither has Power ISA v3.0 from 2015 (or v3.0B from 2017) been contributed to the OpenPOWER Foundation nor does v3.0 (or v3.0B) have any compliancy subsets. Both things started only with v3.0C/3.1.
    These changes to the slides must have been made deliberately. What the heck is going on there?


    Edit: "V3.0C" mentioned in https://www.youtube.com/watch?v=SO8a8zcAiZc (at 13:00 and 20:04) and https://video.fosdem.org/2021/D.power/microwatt_grows_up.mp4 / https://video.fosdem.org/2021/D.power/microwatt_grows_up.webm (at 5:00 and 13:33)
    (Btw, funny how Paul Mackerras in the first video at 11:45 claims that the ISA renaming in 2006 from PowerPC ISA (v2.02) to Power ISA (v2.03) by Power.org happened because Freescale allegedly had very much stopped using the ISA so that it was pretty much just about the IBM POWER line of server CPUs at that time (and in the second video at 4:18 that it happened because IBM allegedly was the only company using the ISA or making any new CPUs with it), when in fact the opposite is true, namely that the renaming represented the incorporation of the Book-E extensions (implemented by IBM PPC440/PPC460 and Freescale e200/e500 back then, which are embedded class and thus as un-POWER as possible) into the official ISA specification.)

    [ Edited by Andreas_Wolf 18.02.2021 - 22:03 ]
  • »22.09.20 - 21:36
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  • Yokemate of Keyboards
    Yokemate of Keyboards
    Andreas_Wolf
    Posts: 11719 from 2003/5/22
    From: Germany
    Update:

    > Schedule:
    > - 2020 "shuttle smoketest" tapeout of 180nm (TSMC) embedded-class
    > single-core chip, OOO, pipelined
    > - 2021 commercial single-core or quad-core (information are conflicting
    > here) chip with GPU
    > - 2022 commercial 0.8-1.0 GHz quad-core chip with GPU (25-50 GFLOPS),
    > 1080p25 video, VPU, DDR SDRAM controller, SERDES, UART, LPC,
    > JTAG, GPIO, 3 watts power consumption

    Most recent Libre-SOC schedule from the mission statement:
    - 12/2020: "demo" of 180nm single-core dual-issue 64-bit QFP chip, saleable in the "Embedded" space
    - later: 800 MHz quad-core dual-issue SoC with 4-wide FP32, hybrid CPU/GPU/VPU
    - even later: addition of an ML inference core


    Edit:

    Even more recent schedule from the business plan:
    - Q2/2021: 130nm test chip (Google/SkyWater MPW shuttle program)
    - Q4/2021: 180nm QFP SoC
    - Q2/2022: 28nm or 20nm quad-core SoC for BMC and SBC use; USB-C and PCIe host/device controllers, i.e. also usable as peripheral GPU
    - Q2/2023: then-latest process node; targetting smartphones, netbooks, tablets, IoT and IPTV

    Seems the previous schedule got delayed by some months.

    [ Edited by Andreas_Wolf 28.12.2020 - 12:02 ]
  • »07.12.20 - 07:41
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  • Yokemate of Keyboards
    Yokemate of Keyboards
    Andreas_Wolf
    Posts: 11719 from 2003/5/22
    From: Germany
    Update:

    > ChipEleven: https://chipeleven.com
    > [...]
    > Features acc. to sources:
    > - market-ready by spring 2022
    > - 3 watts power budget
    > - PythonWatt quad-core: pipelined, 8-stage, SMP, 1.5 GHz
    > - Mali GPU, 1080p60 video
    > - DDR4, PCIe, IPMI, LPC, USB2, GbE

    Some additions and changes according to website:
    - market-ready by spring 2023 (i.e. a year delayed)
    - SoC name: SuperPOWER
    - single-issue, out-of-order execution core
    - Mali-G77 GPU
  • »06.01.21 - 21:54
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  • Yokemate of Keyboards
    Yokemate of Keyboards
    Andreas_Wolf
    Posts: 11719 from 2003/5/22
    From: Germany
    Update:

    > schedule from the business plan:
    > - Q2/2021: 130nm test chip (Google/SkyWater MPW shuttle program)
    > - Q4/2021: 180nm QFP SoC
    > - Q2/2022: 28nm or 20nm quad-core SoC for BMC and SBC use; USB-C and
    > PCIe host/device controllers, i.e. also usable as peripheral GPU
    > - Q2/2023: then-latest process node; targetting smartphones, netbooks, tablets,
    > IoT and IPTV

    Most recent schedule update*:
    - 202X: 300 MHz single-core
    - 202X+2: quad-core
    - 202X+4: 8-core
    - 202X+6: 64-core

    (* The notion that VSX is 15 years old is incorrect. VSX was first specified in Power ISA v2.06 in 2009 and first implemented in POWER7 in 2010.)


    Edit: "Quad and 8 1.5+ ghz on the roadmap over the next 3 years"

    [ Edited by Andreas_Wolf 20.07.2021 - 01:47 ]
  • »15.04.21 - 20:34
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  • Order of the Butterfly
    Order of the Butterfly
    ernsteiswuerfel
    Posts: 482 from 2015/6/18
    From: Funeralopolis
    Ah, finally we are getting somewhere! At least the 'quad-core as SBC' looks interesting. But we'll have to wait and see how this translates to available products in 202X+2. ;-)

    @Andreas_Wolf: Thanks for your continuous updates! Looking at the schedule update you posted I gather that VMX/VSX will not be implemented (too much work?) for the time being?
    Talos II. [Gentoo Linux] | PMac G5 11,2. PMac G4 3,6. PBook G4 5,8. [MorphOS 3.17 / Void Linux / Gentoo Linux] | Vampire V4 SA [ApolloOS / Amiga OS 3.2.1]
  • »15.04.21 - 21:30
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  • Yokemate of Keyboards
    Yokemate of Keyboards
    Andreas_Wolf
    Posts: 11719 from 2003/5/22
    From: Germany
    > I gather that VMX/VSX will not be implemented (too much work?)
    > for the time being?

    Yes, correct. Their long-term plan is however to not implement VMX/VSX ever but instead somehow convince IBM and the OpenPOWER Foundation to abandon VSX in favour of Libre-SOC's non-SIMD SimpleV (or Simple-V, seems they can't decide on one spelling variant) vector augmentation.
  • »15.04.21 - 23:03
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  • Order of the Butterfly
    Order of the Butterfly
    ernsteiswuerfel
    Posts: 482 from 2015/6/18
    From: Funeralopolis
    Lets hope this thing won't turn up in BMCs only...
    Talos II. [Gentoo Linux] | PMac G5 11,2. PMac G4 3,6. PBook G4 5,8. [MorphOS 3.17 / Void Linux / Gentoo Linux] | Vampire V4 SA [ApolloOS / Amiga OS 3.2.1]
  • »04.06.21 - 10:23
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  • Yokemate of Keyboards
    Yokemate of Keyboards
    Andreas_Wolf
    Posts: 11719 from 2003/5/22
    From: Germany
    > Lets hope this thing won't turn up in BMCs only...

    Which one? RED's Libre-SOC, ChipEleven's PythonWatt/SuperPOWER, or LibreBMC's A2P? :-)
  • »04.06.21 - 12:00
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  • Order of the Butterfly
    Order of the Butterfly
    ernsteiswuerfel
    Posts: 482 from 2015/6/18
    From: Funeralopolis
    Any of the above. ;-)
    Talos II. [Gentoo Linux] | PMac G5 11,2. PMac G4 3,6. PBook G4 5,8. [MorphOS 3.17 / Void Linux / Gentoo Linux] | Vampire V4 SA [ApolloOS / Amiga OS 3.2.1]
  • »04.06.21 - 15:21
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  • Yokemate of Keyboards
    Yokemate of Keyboards
    Andreas_Wolf
    Posts: 11719 from 2003/5/22
    From: Germany
    > First test chip tape-out (180nm) is claimed to be a mere 5 days away

    Took a little longer: https://openpowerfoundation.org/libre-soc-180nm-power-isa-asic-submitted-to-imec-for-fabrication/

    The Libre-SOC test ASIC is claimed to be "implementing a fixed-point subset of the v3.0B OpenPOWER ISA", which is strange considering that compliancy subsets were introduced only with v3.0C of the ISA. There are no subsets in v3.0 or v3.0B.

    Fun fact: "The Cell Library used, FlexLib, […] was developed by Staf Verhaegen of Chips4Makers […]." This happens to be MorphZone member Fats.

    And of course, also this significant event doesn't come without some dubious statements from the project lead:

    "Libre-SOC […] is the first wholly-independent Power ISA ASIC outside of IBM to go Silicon in 12 years."
    Well, during the last 12 years, Freescale/NXP has released more than a dozen different e200-based ASIC products (not counting variants of those), the most recent one being the 16nm S32R294 released this year. Also, the entire QorIQ T family and most of the QorIQ P family are younger than 12 years. Would be interesting to know which 2009-ish non-IBM Power ISA ASIC with IBM-independent microarchitecture he's referring to here in particular, and why he doesn't accept all those later NXP/Freescale ASICs to meet his mentioned criteria.**

    "they had to go through some serrioous review to get OpenPOWER out the door and into the OPF, ironically it's been ongoing for something like a decade, long before RV existed."
    To contrast this with the timeline as it took place in the real world:
    2010: RISC-V project started
    2011: first version of RISC-V ISA released
    2013: OpenPOWER Foundation founded (as OpenPOWER Consortium)
    2015: RISC-V Foundation founded, Power ISA v3.0 released*


    * Edit1: more of this nonsense

    ** Edit2: He tried again and failed once more:
    "our […] test ASIC […] is […] the world's first Power ISA 3.0 [ASIC] outside of IBM to reach Silicon in over 12 years."
    How can there have been a Power ISA v3.0 ASIC over 12 years ago when Power ISA v3.0 was published only 6 years ago? Which ASIC is he referring to with this statement? Unless I missed something, Libre-SOC is the first Power ISA v3.0+ ASIC outside of IBM ever.

    [ Edited by Andreas_Wolf 20.10.2021 - 09:52 ]
  • »08.07.21 - 19:14
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  • Yokemate of Keyboards
    Yokemate of Keyboards
    Andreas_Wolf
    Posts: 11719 from 2003/5/22
    From: Germany
    Update:

    > POWER10

    Seems it will be Power10 instead of POWER10:

    https://www.rpgpgm.com/2021/07/ibm-updates-power-branding.html
    https://www.itjungle.com/2021/08/02/no-more-shouting-the-name-power-well-except-in-our-title-here/
    https://www.ibm.com/it-infrastructure/power/power10

    …which in my humble opinion is a stupid decision for the following reason:
    So far, Power has been (since superseding PowerPC in 2006) the name of the instruction set architecture (ISA), while POWER has been the name of IBM's line of server CPU microarchitectures (POWER1…9, with POWER3…5 implementing PowerPC ISA and POWER5+…9 implementing Power ISA). This means that so far, the (non-)capitalization of the word can be used for distinction between ISA and microarchitecture. With Power10, this will be no more. The ISA and the IBM server CPU microarchitecture will both go by the very same name: Power. So what will be the correct answer to the question whether 440/460/470, A2, e200, e500, e5500, e6500, PA6T or any of the new (soft)cores discussed in this thread are Power? Well, it will depend on what the questioner has in mind, making room for misunderstandings. The correct answer will be 'yes' for Power [ISA], but it will be 'no' for Power [microarchitecture].
  • »07.08.21 - 13:25
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