The presentation is ok, though some of the "feature" sheets are a bit cluttered but that lies a bit in the nature of such feature sheets of course
Don't really think all those arrows are needed. Also the background with those buildings should be lighter so the sheets are better readable. Other than that it looks fine.
Tarbos wrote...
Quote:
For HPC the G5 has a distinct advantage due to its faster busses (1250MHz Datarate instead of 167MHz), dual-FPU and 66% better clock speed. The 64-bitness is just icing on the cake.
Exactly! Doesn't even matter if MOS will be 64 bit, as long as it works. Those other architectural improvements will speed it up greatly already.
bbrv wrote...
Quote:
10% not G5, not 64 bit
Do I understand correctly that you cancelled the G5 peg 3 boards (because of heat or supply problems) then?
I thought that the peg 3 was already announced:
on 19 jul 2003 bbrv wrote on morphos-news:
Quote:
Frankly, the G4 works and we will make some, but the investment required does not correspond to the performance gained. This is why we let the information slip into the thread about the Pegasos III and the 970. With the 970 we can see the potential.
And on that last presentation I see "Future versions of PegasosPPC will closely mirror next generation CPU releases". So I hope I was wrong in the above assumption
(although Moore's law will be slowed down because of etching problems in the future with SiON and other higher-k materials than SiO2 needed for the gates, so we'll be golden for a while with a G5).
I already saved up for when it comes out, so I really hope the plans are not abandoned
IBM has solved their 90 nm manufacturing problems, while the 90 nm G5's run cooler than the 130 nm ones, the difference between 2 lithography generations isn't so dramatic as before.
So perhaps the peg3 could use an (older, cheaper) 130 nm PPC 970 (made in older IBM factories - they probably don't want to throw all those "old" wafersteppers and etching tools away!) which is underclocked to like 1.4 GHz. The architectural advancements alone are quite large over the G4, underclocking would mean you wouldn't need an extreme cooling solution.
Although Apple now wants to move their imac line to G5's which may introduce shortages again
For the people talking about the cell processor which will be used in the PS3, this could be interesting in the (far) future of Genesi as well...
Indeed one chip (and they are scaleable) can "theoretically" crank out matrix calculations 20 times faster than the GeforceFX 5800/5900/5950 (NV30/35..). 1 Tflop = 1000 Gflops for 1 cell chip vs 51 for NV30/35 vs 8 for Itanium2. That's huge! Oh and you don't need a graphics card anymore because of that, so no more driver nightmares either (though writing the 3D driver for the architecture may be quite some work). It's also much more flexible since they are not limited to graphics only and you can completely change the code paths.
Architecturally it basically consists of 4 simple powerpc cores with many coprocessors (128, but this is variable depending on the precise implementation). These coprocessors have NO cache thus making their silicon footprint very small. Of course this means all pipes inside (between coprocessors and processors etc.) and to the processor (certain rambus high bandwidth things are licensed in PS3) need to be really fast or the design not to implement cache on them would be fatal to performance. If done well, streams (like... all multimedia, especially 3D matrix calculations) can be processed really really fast. If one of the next generation pegasos (or the set top boxes) needs to stay competitive perhaps it is a good idea to licence these cell chips in the future plans. As I understood IBM/Sony may sell these for "PC boards" so perhaps they will licence them as well. Since powerpc chips are already used in the pegasos, the OS would be easy to port as well. It would be a golden opportunity to outdo the PC industry imo (that is, depending on the terms of Sony/IBM of course for the licensing). Oh and of course a small kernel with tasks like networking outside of the kernel (like I understood MOS has, but unlike linux) will be better suited for multiple procs than the case with lots of stuff in the kernel, so I'm sure MOS would run great on a cell chip! (Usually people put a lot of stuff in the kernel to avoid taskswitching overhead between different processes, but putting less stuff in the kernel can make it easier letting OS tasks run on different processors since they run in userspace and the kernel only does (async) messenging). Oh and above all, these Cell's will be "very cheap", especially for their performance. Pegasos with one (or more, since they are scaleable!) cell processor in it would be a dream machine reminding of the revolutionary things the Amiga did back in the day!
For more info see: http://www.ps3land.com/CELL.ppt
http://arstechnica.com/news/posts/1084391000.html
http://www.ps3insider.com/modules.php?name=Content&pa=showpage&pid=3
I hope that will become part of the future strategy of the Peg
Azalin - AthlonFX53 2.6 GHz "4000+" 1 Gb SuSE 64 bits UAEAmiga!
[ Edited by azalin on 2004/7/18 20:47 ]