> At first, I could not tell by the articles on this whether it was two pin compatible
> designs or one chip with both ISAs. Now that I have realized it is the later

Is it? I understand it's the former.

> I am having trouble seeing the utility in this idea. A totally ASMP design with two
> instruction sets.

It can have utility for special purposes, for instance where there's a main ISA and another ISA for a security core. AMD did this before:

http://www.anandtech.com/show/6007/amd-2013-apus-to-include-arm-cortexa5-processor-for-trustzone-capabilities

And Applied Micro did this even earlier:

https://morph.zone/modules/newbb_plus/viewtopic.php?forum=3&topic_id=7675&start=268

> Sounds like the complications inherent in using such a device would outweigh
> the benefits.

If the two ISAs are supposed to be equipollent, yes. See:

http://en.wikipedia.org/wiki/PowerPC_600#PowerPC_615