> I wonder how well the T5020 would work in a similar design.

You mean together with an AMD southbridge? Let's assume the T5020 is essentially an AltiVec-enabled P5020, having available the same, if not better/more, on-chip controllers as P5020. Would you really need a southbridge at all, then? The PA6T is a rather rudimentary SoC, whereas the P5020 is way more complete. So in summary, a T5020 based board design wouldn't be similar to a PA6T based board design.

> I still haven't gotten a complete idea of how many PCIe lanes the
> e5500 based processors support.

For the P5020/P5010 Freescale says "4x PCI Express 2.0 controllers" (PCIe 2.0 is double the speed of PCIe 1.0, which is on the PA6T). Furthermore, they mention 18 SerDes lanes overall (PA6T has 24, but half-speed each), but I don't know if they're configurable like on the PA6T. On the other hand, more on-chip controllers means less PCIe lanes needed.