> ARM doesn't support Big Endian in anything but a bullet-point
> feature sense.

Opposed to what you (and downix for that matter) claim, at least StrongARM and XScale are able to do true big-endian. Or what do you think the already mentioned Debian ARMeb, Debonaras, SlugOS/BE and Angstrom for IXP4xxbe are for?

> The same is true of PowerPC processors which supposedly support
> Little Endian operation.

No, true little-endian is supported at least by MPC8xx/e200, e300, e500, PPC4xx, (upcoming) PPC A2 and PA6T/PWRficient.

For e300 refer to page 23 of http://www.lauterbach.com/pdf/debugger_ppc600.pdf

> ARM does support Big Endian [...]. Only the XScale model does not.

XScale definitely does support true big-endian (see Debian ARMeb, Debonaras, SlugOS/BE and Angstrom for IXP4xxbe).

> The fastest ones I've seen in person have been Marvell's 1.2Ghz
> dual core model (78200).

According to the Marvell website the dual-core MV78200 maxes at 1.0 GHz. At 1.2 GHz it would rather be the single-core MV78100 or the single-core 88F6281.

Quote:
The MV78200 site clearly lists 1.2Ghz. However, then I've looked for them for sale at various vendors, I could only find the 1ghz and 800Mhz models listed as available, so we both might be right in that yes, there is an MV78200 at 1.2Ghz, but it might not be available in any significant volume at this time, nor even shipping yet.

As for the BE/LE thing about XScale, I went and dug up the reference I was using. I'd realized I was looking at a very old reference for StrongARM from DEC, and was for a prototype unit at that, so consider that statement retracted.

> we both might be right in that yes, there is an MV78200 at 1.2Ghz,
> but it might not be available in any significant volume at this
> time, nor even shipping yet.

Yes, that sounds like a probable explanation.
May I ask, where and when did you see the MV78200 at 1.2 GHz in person?


Another thing that puzzles me regarding Marvell and ARM:

According to Marvell, their Sheeva core was developed from both the Intel XScale and their own Feroceon CPU, both being ARMv5 ISA implementations. So one would assume the Sheeva to be ARMv5 ISA compliant as well. But then there is this:

"Compliant with the Cortex A8, Sheeva also supports both the ARMv6 and ARMv7 instruction sets, making it the world's first dual ARM ISA compatible CPU."
http://www.marvell.com/technologies/cpu_history/cpu_history.jsp

What's Sheeva then? ARMv5 (like XScale and Feroceon), ARMv6 or ARMv7 (like Cortex-A8)? Or a combination of these? Very confusing. Can anyone shed some light, please?


Edit:

http://www.marvell.com/files/technologies/SheevaUntoldStory.pdf from August 2008 provides some further clues:

"2009 - A new flagship CPU: Newest CPU core features multi-Ghz performance, [...] out-of-order execution, and full ARMv6 and ARMv7 compatibility"
(page 2, "Figure 1. Timeline of Marvell CPU development")

"Marvell has extended its license to cover ARM v6 and v7, the most recent version of the architecture. The company expects to sample its first ARM v7 CPU in late 2008."
(page 3)

So it seems that contrary to the statement on the Marvell "History of CPU" webpage current Sheeva core(s) are ARMv5 ISA compliant and *not* ARMv6 or ARMv7 ISA compliant but *future* Sheeva cores are supposed to be.

On a sidenote, pages 5/6 are good for some great laughter:

"Marvell's recent 88F6000 processors achieve CPU speeds of up to 2.0GHz. This clock speed [...] is faster than any [...] PowerPC processor [...] To minimize cost and power, the 88F6000 processors use a simpler CPU design than other Marvell products. This CPU is a scalar design, executing only one instruction per cycle, and it has no reordering capability."

A fabled 2.0 GHz in-order non-superscalar ARMv5 faster than for instance an existing 2.0 GHz out-of-order superscalar PPC970FX? Good one ;-)

[ Edited by Andreas_Wolf on 2009/3/23 17:28 ]

Quote:
NDA from work, sorry to say. Should be able to discuss details in the next 3 months tho, if nothing goes wrong.

> NDA from work

So you have an MV78200 running at 1.2 GHz at work while "it might not be [...] even shipping yet"? Sounds like magic to me.

Quote:

Samples shipped over a year ago, not magic to me. You stop caring so much when it's the dozenth "next-big-thing" CPU you've had to handle this month. Some days I get surprised at things which have not shipped yet, or even worse, ones that have.

Did some digging, Marvell's 88F6281 is listed as being able to be clocked at up to 2Ghz, due for release this year. The 1.2Ghz version of this chip can be found in the SheevaPlug, which is a fun thing to play with I must say.

> Marvell's 88F6281 is listed as being able to be clocked at up to
> 2Ghz, due for release this year.

We'll see. In June 2008 it was announced to be clocked up to 2 GHz, 4 months later (page 2) it was reduced to 1.5 GHz, and finally it has been released with 1.2 GHz max.

Quote:Right, but that is where I'd gotten the 2Ghz speed I'd listed earlier. I do like being complete.

In any case, no denying that the access of a 1.2Ghz ARM system for $100 is quite appealing, yes? Or a $150 for a slower system which also includes DSP and GPU?

> that is where I'd gotten the 2Ghz speed I'd listed earlier.

Then why did you state that the 2 GHz version of the 88F6281 was "due for release this year" when you even knew that there's only 1.2 GHz max, opposed to the announcement?

> I do like being complete.

I rather call that "being behind" and "ignoring when announcements get superseded by reality" :-P

> no denying that the access of a 1.2Ghz ARM system for $100 is quite
> appealing, yes?

Yes, for people who are interested in a non-superscalar, in-order ARMv5 chip :-P

> Or a $150 for a slower system which also includes DSP and GPU?

Do you know how much slower a 600 MHz superscalar ARMv7 CPU is compared to a 1.2 GHz non-superscalar ARMv5 CPU?

Update:

> hopefully upcoming Titan (not cancelled yet)

10 days ago, AppliedMicro (former AMCC) announced the first Titan core based SoC, the dual core APM 83290 (codename: Gemini). It's supposed to reach up to 1.5 GHz. More information here and there.

> 10 days ago, AppliedMicro (former AMCC) announced the first Titan core based SoC,
> the dual core APM 83290 (codename: Gemini). It's supposed to reach up to 1.5 GHz.

Today, AppliedMicro announced the sample availability of the APM 83290 starting now and production number availability for Q1/2010.

> Another thing that puzzles me regarding Marvell and ARM:
>
> According to Marvell, their Sheeva core was developed from both the Intel XScale and
> their own Feroceon CPU, both being ARMv5 ISA implementations. So one would assume
> the Sheeva to be ARMv5 ISA compliant as well. But then there is this:
>
> "Compliant with the Cortex A8, Sheeva also supports both the ARMv6 and ARMv7
> instruction sets, making it the world's first dual ARM ISA compatible CPU."
> http://www.marvell.com/technologies/cpu_history/cpu_history.jsp
>
> What's Sheeva then? ARMv5 (like XScale and Feroceon), ARMv6 or ARMv7 (like
> Cortex-A8)? Or a combination of these? Very confusing. Can anyone shed some light,
> please?
>
>
> Edit:
>
> http://www.marvell.com/files/technologies/SheevaUntoldStory.pdf from August 2008
> provides some further clues:
>
> "2009 - A new flagship CPU: Newest CPU core features multi-Ghz performance, [...]
> out-of-order execution, and full ARMv6 and ARMv7 compatibility"
> (page 2, "Figure 1. Timeline of Marvell CPU development")
>
> "Marvell has extended its license to cover ARM v6 and v7, the most recent version of the
> architecture. The company expects to sample its first ARM v7 CPU in late 2008."
> (page 3)
>
> So it seems that contrary to the statement on the Marvell "History of CPU" webpage current
> Sheeva core(s) are ARMv5 ISA compliant and *not* ARMv6 or ARMv7 ISA compliant but
> *future* Sheeva cores are supposed to be.

To answer my own question from 9 months ago in conclusion:

There's currently 2 types of Sheeva cores: The older Sheeva PJ1, which implements ARMv5 ISA, and the new Sheeva PJ4, which implements ARMv7 ISA.

http://www.marvell.com/company/news/press_detail.html?releaseID=1341
http://www.google.com/search?q=marvell+sheeva+pj1+pj4

Mystery solved, case closed :-)


Edit:
Changed press release URL due to Marvell website redesign.

[ Edited by Andreas_Wolf on 2010/2/18 14:44 ]

> upcoming PPC476

See there :-)

> and PPC A2

IBM's long-standing "Next-gen" "64-bit Commercial Core" mystery seems to be demystified finally. Indeed the longish-rumoured PowerPC A2 just seems to be that very core. When IBM released their POWER7 processor 1.5 weeks ago they concurrently (well, half an hour later actually ;-) unveiled their upcoming PowerPC A2 core and processors based on that core.

http://en.wikipedia.org/wiki/PowerPC_A2
http://www.isscc.org/isscc/2010/ISSCC2010_AdvanceProgram.pdf (page 21, from 11/2009)
http://submissions.miracd.com/ISSCC2010/WebAP/PDF/AP_Session5.pdf (page 2, from 11/2009)
http://www.research.ibm.com/journal/abstracts/rd/541/franke03.html (from 2010)

> Today, AppliedMicro announced the sample availability of the APM 83290 starting
> now and production number availability for Q1/2010.

According to Lauterbach, the APM83290 has a PPC450 core:

http://www.lauterbach.com/pro/pro__amcc.html
http://www.lauterbach.com/pro_amcc.html#PowerPC_450

Does that mean that Applied Micro's "Titan" core is a Fast14 enhanced and thus upclocked PPC450 core?

Update:

> upcoming PowerPC A2 core and processors based on that core.

Some more information about the A2 core and the PowerEN processor (Power Edge of Network, formerly known as "Wire-Speed Processor") based on that core:

http://www.power.org/events/2010_ISSCC/ (don't miss the two PDF files)

According to The Register the A2 core is a trimmed down POWER7 core:

"On the networking and data center front, IBM will be talking some more about its Power Edge of Network, or PowerEN, which is a 16-core, Power-derived processor that IBM also talked about at the International Solid State Circuits Conference in February. This chip, known as the Wire-Speed Processor back then, has 16 cores, each with four threads, derived from the Power7 architecture but with lots of stuff ripped out that's not necessary for an inline processor that chews on data and passes it on as it sits on the network."
http://www.theregister.co.uk/2010/06/28/hot_chips_22_preview/

Update:

> Today, AppliedMicro announced the sample availability of the APM 83290
> starting now and production number availability for Q1/2010.

Bad news from 5 weeks ago:

"AppliedMicro has scuppered its APM83290 dual-CPU IC based on the Titan CPU it developed with Intrinsity. Instead of selling the processor as a product, AppliedMicro will offer it as a development vehicle to customers and then convert these customers to undisclosed, forthcoming 40nm processors with similar capabilities but a different CPU."
http://www.mdronline.com/processor_watch/watch_issue.php?processor_watch_id=646
http://webcache.googleusercontent.com/search?q=cache:www.mdronline.com/watch/watch24_0709.html#3

"AppliedMicro will not productize its first dual-CPU processor, the 90nm APM83290, which was developed in conjunction with Intrinsity. Instead, the company will supply this processor only in sample quantities and later convert customers to a homegrown 40nm processor."
http://www.mdronline.com (under "July 5, 2010")

Addendum:

> According to Lauterbach, the APM83290 has a PPC450 core

In contrast to Lauterbach, a new edition of Wikipedia's PPC4xx article claims that Titan was designed "using the PowerPC 440 core spec".

http://en.wikipedia.org/wiki/PowerPC_400#Titan

Either way, there's still something else mysterious about it: According to Wikipedia, PPC440 and PPC460 (and thus I conclude PPC450 as well) comply to Power ISA v2.03+, whereas Titan complies to Power ISA v2.04+ (i.e. not to v2.03). Strange.

What an insightful thread. I struggle to understand every update, and its possible implications.

What would the chip engineers think if they red this? Perhaps they would be surprised by the interest that their creatures still spark in some people...

Thanks Andreas,

It sometimes reads as if you're the only person following/contributing to these threads, but it makes for intersting reading (to me at least), so please do not stop

> Perhaps they would be surprised by the interest that
> their creatures still spark in some people...

Why "still"?

Addendum:

>> According to Lauterbach, the APM83290 has a PPC450 core

> In contrast to Lauterbach, a new edition of Wikipedia's PPC4xx article
> claims that Titan was designed "using the PowerPC 440 core spec".
> http://en.wikipedia.org/wiki/PowerPC_400#Titan
> Either way, there's still something else mysterious about it: According to Wikipedia,
> PPC440 and PPC460 (and thus I conclude PPC450 as well) comply to Power ISA v2.03+,
> whereas Titan complies to Power ISA v2.04+ (i.e. not to v2.03). Strange.

Another opinion:

"Except for Freescale, most Power licensees base their devices on CPU core designs from IBM. AppliedMicro is the exception. It developed a new CPU of its own (Titan), then halted that effort and started afresh on a new design that may arrive shortly."
http://www.mdronline.com/processor_watch/watch_issue.php?processor_watch_id=664

So maybe Titan wasn't based on any PPC4xx core at all? The more information I read, the more confusing it gets ;-)

Update:

> Another opinion: [...]

Full article is online:
http://www.power.org/resources/downloads/Power_Architecture_MPR_Article_Aug_2010.pdf

Some notes on its contents:

1. Strangely, Applied Micro's APM86xxx processor is omitted from this depiction of the most recent Power Architecture roadmap version (page 3), so that their "Next-gen" "32-bit Commercial Core" seems to lack an accompanying processor.

2. Quote: "Titan, the company's first attempt to design its own CPU, ended up on the scrap heap when design partner Intrinsity was acquired by Apple [...]. Much of that work has been rolled into a new AppliedMicro design, however." (page 4)

That really sounds like basically a shrinked Titan without Fast14.

3. Quote: "Revision 2.04 [...] was only implemented by PA Semiconductor (which has since been acquired by Apple) and in AppliedMicro's Titan (which has since been canceled), so it never saw the light of day." (page 2)

Huh? PA6T "never saw the light of day"? Don't think so.

4. Quote: "e5500 [...] is expected to run at 2.2GHz when it debuts in the QorIQ P5 series in 4Q10" (page 3)

According to Freescale's QorIQ P5020/5010 product page:

"...initially offered at 2.0GHz..."

5. Quote: "Freescale's high-end QorIQ P5 will clock at a "mere" 2.2GHz--about 50% slower than Intel's Core i7." (page 2)

2.2 GHz being 50% slower means 100% equating 4.4 GHz. I doubt that by the time the QorIQ P5 is released the Core i7 will clock anywhere near that level. Current Core i7 is at 3.3 GHz maximum. 2.2 GHz is only 34% slower than 3.3 GHz.

6. Quote: "Xilinx [...] has announced its intention to work with ARM but not any details of the upcoming chips themselves." (page 4)

Seems they missed something:

http://press.xilinx.com/phoenix.zhtml?c=212763&p=irol-newsArticle&ID=1418796
http://www.xilinx.com/technology/roadmap/processing-platform.htm