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[ Edited by Velcro_SP 19.04.2011 - 15:35 ]

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[ Edited by Velcro_SP 20.04.2011 - 07:06 ]

> I'm thinking I'll put it in my signature block.

Don't forget to add that in the paragraph before and the one after you were referring to MPC5121e based platforms specifically.

Frankly, I was waiting to see how you would respond.
The long delay signifying more than you'd be willing to admit.
You could use one paragraph (taken out of a group) as a signature block, but its content would be no less obtuse than most of what you've posted.
I believe signature blocks are usually used to relay content that is thought provoking or clever. Most of what you've had to say is neither.

And I'll stop posting my background information as, again, I'm not worried about your opinion on such matters.

Your misstatement was completely clear. I will not post that content because its been done repeatedly and you fail to acknowledge it.
Therefore, giving additional points you can analyze and then comment on merely allows you to dismiss your own mistakes and focus on what you perceive as the flaws in those that you think of as adversaries.

Regardless of my personal history, I can read and understand English. Even when its poorly worded.

Instead of adding the previously mentioned paragraph as a signature block, why not just add chip? Or you could switch to using that as your ID. Or we could just consider it your unofficial "nickname".

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[ Edited by Velcro_SP 20.04.2011 - 07:04 ]

> both of those surrounding paragraphs refer specifically not only to 5121e-based
> platforms but to non-5121e-based platforms: above to Limebooks (which includes
> X86 models, remember?)

Let's see:

"I'd like to see where the software has gone with the Linkbook and LimePC models. All I have to go on is an original Cherrypa1 with an 18-months-old OS that I haven't been able to update."

The Linkbook, which is a relabeled LimeBook Z9, is MPC5121e based. And while there're indeed x86 based LimePC models, your statement was about "where the software has gone" with them when we just before (see what you responded to with that posting) discussed the (lacking) driver support for both the PowerVR and the AXE core of the MPC5121e. None of the x86 based LimePC models have AXE or PowerVR. In fact, AXE is to date nowhere else than inside the MPC5121e and MPC5123, and the Atom based LimeBook Z10 has Intel GMA 950 graphics. So I conclude: This paragraph is solely about MPC5121e based hardware.

> and below to ACube PPC computers.

Let's see:

"I don't mean to zero in on the 5121e as the only thing, but really even given the uncertainty it seems much more established to me than this other low-wattage, small stuff. I like the ACube computers too, but they are somewhat larger and higher wattage."

Here you are mentioning ACube as a side note, yes. But your main point is clearly about the MPC5121e being superior over other solutions, which are (in your opinion) either not established enough or not small and low wattage enough.

> those paragraphs would seem to indicate that I spoke broadly

To me they indicate being focused on the MPC5121e and systems based on that very SoC.

> I don't think you linked it right.

I think I did.

> Why don't you just quote it completely here?

Done.

> Let the readers decide from that.

Of course. It's all about transparency.

> All without fresh commentary from you or me.

Huh? Of course I do comment these paragraphs to prove that you subsequently try to mispresent their contents. After all, commenting them is what you just did yourself.

> I'll leave it alone after that unless you start at it again.

Starting exactly *what* again? Answering your postings that are directed at me?

> I'm not going to respond to the stuff you said in the couple of posts before this

Yes, that's quite obvious.

> For the record I disagree with it.

For your record I see that you ran out of arguments :-)

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[ Edited by Velcro_SP 20.04.2011 - 06:54 ]

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[ Edited by Velcro_SP 20.04.2011 - 06:53 ]

> I asked Andreas to give you the straight quotes so you could read them

Which I did.

> without him (or me!) telling you what they mean.

You *did* tell what you subsequently are trying to present as their meaning. I quote your own words from your posting I just responded to:

"both of those surrounding paragraphs refer specifically not only to 5121e-based platforms but to non-5121e-based platforms: above to Limebooks (which includes X86 models, remember?) and below to ACube PPC computers."

So when you yourself do that why should I not be allowed to do the same? Double standard?

> instead he wrote you

Wrong, to *you*, Velcro_SP. It's really just you I'm talking to when responding to your postings.

> a short story to explain them

I just proved that you mispresent what you actually wrote in those paragraphs. By commenting them I don't keep anyone from reading them like I quoted them in full (as you wished) and making up their own mind. I think you're underestimating the discernment of others by far.
And why should I quote what you wrote without commenting it when I even linked to it just before? If that doesn't satisfy you then it's up to *you* to quote your own words without commenting them in any way.

> to you.

Wrong, to *you*, Velcro_SP. It's really just you I'm talking to when responding to your postings.

> I disagree with everything he said.

I didn't expect anything else.

> The part where he says I "subsequently tried to misrepresent" is untrue.

I think the part where I say this is nothing but the truth. And I think I proved it.

Quote:

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[ Edited by Velcro_SP 20.04.2011 - 06:48 ]

Ok, so someone needs to work on their issues, not sure this is the place for that.

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[ Edited by Velcro_SP 20.04.2011 - 06:51 ]

STOP, PLEASE! BOTH OF YOU!

> I responded briefly to your observation that the neighboring paragraphs
> "specifically" referenced 5121-based systems and its clear implication that
> therefore the middle one does too.

Yes, and by doing so you commented these paragraphs. That's why I don't understand that you asked me to not comment them either when in fact you did.

> I said that they also specifically reference other systems and so that
> logic really seems to lean the other way.

You are right. The 3rd paragraph mentions ACube systems specifically. Here I said something I didn't mean. Sorry for that. I was thinking of "mainly" when I wrote "specifically". My bad.

> I then said just post the paragraphs since you brought it up, don't further comment

Yes, you said that in the same posting where you yourself had commented them.

> and let others decide.

I don't think it's about any "others". At least not from my side. But of course it's a public discussion and anybody can take part in it, passively or even actively.

> You didn't say "main point" at the time. That's different from your "specifically."

Yes, you're right in that. See above.

> "Main point" requires reading and evaluation.

Yes, that would be my "short story".

> Before I do that, would you mind clarifying what your end point is? That I specifically
> advocated putting a PowerVR chip on a 5121e-based system and wasn't speaking
> of anything else at all?

No, but that you were also (and, by taking the two surrounding paragraphs into account, even mainly) speaking of MPC5121e based systems and thus also (or even mainly, see above) advocated putting a PowerVR chip on an MPC5121e based system.

> That you recognized I was speaking broadly but putting a PowerVR chip on
> a 5121e-based system was one possible outcome?

No.

> That maybe I wasn't advocating that at all, but you had fair reason at the time to
> believe it and did believe it because of the context and the words I used?

Short answer: No.
Long answer: The second part (after "but") would be "yes". The first part fails to regard the conceptual difference between "intending (not) to advocate" (which only happens in the author's mind) and "actually (not) advocate" (which is what is actually written down). As I can't read your mind (and also couldn't at that point in time of course) I cannot answer that question as a whole with "yes" because I'm confident that your actual *words* advocated (also, or even mainly) putting a PowerVR chip on a 5121e based system, which I objected to.

"I know you think you understand what you thought I said, but I am not sure you realize what you heard is not what I meant." Richard Nixon

"Mistakes are always forgivable, if one has the courage to admit them." Bruce Lee

[ Edited by Jim on 2010/8/10 20:58 ]

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[ Edited by Velcro_SP 19.04.2011 - 15:15 ]

Quote:

Making friends, I suppose.

Quote:

Not really, I am usually able to communicate with my friends and a "please stop" works. Here, I failed to make it apparent that the argument was totally boring and pointless. I'm sorry I "yelled".

> It's apparent that VSX is an extention of VMX. I got confused because those few times
> I read about VSX, I missed -or they omitted- VMX mentioned. And until now -that is
> until you made me read more about it :) - I thought they were distinctive units.

I found some more information there:

http://www.power.org/events/Power7/Performance_Guide_for_HPC_Applications_on_Power_755-Rel_1.0.1.pdf

Pages 7/8:
"A new single instruction multiple data (SIMD) instruction set called VSX is introduced in the POWER7 processor. This is in addition to the AltiVec SIMD instruction set which was previously introduced in the PPC970-based system, the JS20 blade server."

Page 69:
"The Vector-Scalar floating point eXtension architecture (VSX) has been developed by IBM to extend SIMD support to include two independent 2-way-SIMD double precision floating point (FP) operations per cycle. The Altivec SIMD features are a subset of VSX. [...] For POWER systems, the "VSX" term has been used to highlight the double precision arithmetic instructions supported by the POWER7 hardware, with "Altivec" reserved for the older 32-bit precision arithmetic SIMD support."

Page 71:
"The POWER7 architecture continues to support the Altivec instruction set, and extends support to double precision floating point operations with the VSX instruction set. The VSU (Vector Scalar Unit) is the hardware that implements the Altivec, VSX and scalar floating point instructions. There are no longer separate scalar FPUs in the POWER7 core. [...] The VSU is the combination of the Altivec execution unit and the 4 FPUs. It is divided into two independent pipes, each of which can execute one instruction per cycle. Each pipe can independently execute a scalar double-precision FP op or a SIMD double-precision FP op. All SIMD operations are on 16-byte vectors of data. Mimicking the behavior of the original Altivec unit, pipe0 handles the simple FX, complex FX and 4-way SIMD single-precision FP ops and pipe1 handles the Altivec permute ops."

Page 83:
"While Altivec and VSX have differences in programming details, they have similar criteria when it comes to deciding how to convert a candidate (scalar) program to exploit SIMD instructions to increase performance."

Page 86:
"The vector multiply-add intrinsic for double precision arithmetic (VSX) is the same as for single precision (Altivec). Not all corresponding VSX and Altivec instructions share the same intrinsic."


Taking these notes into account, my conclusions are as follows:

1. VSX and VMX/AltiVec are really two distinctive physical units.
2. The features of VSX represent a superset of the features of VMX/AltiVec.
3. The VSX instruction set is *not* a superset of the VMX/AltiVec instruction set. In fact, the instruction sets are different (with some overlapping). That means that a processor implementing VSX does not necessarily implement VMX/AltiVec. A program using VMX/AltiVec instructions will therefore not run on a processor that implements just VSX, but can be changed on source code level to use VSX instead.

Any objections? ;-)

>The VSU (Vector Scalar Unit) is the hardware that implements the Altivec, VSX and scalar floating point instructions.>

I don't know, Andreas. From that statement, I would gather that all floating point operations are performed by one hardware unit designed the execute all three of sets of instructions.
While these instructions could be implemented separately, they don't appear to have been in Power7.
Therefore, VSX isn't a superset of the VMX/Altivec instructions, and would appear to act like many of the instructions added over the years to X86 processors.
There are many old X6 instructions (including many old math coprocessor routines) that remain in the architecture (and allow for backward compatibility) that have been rendered irrelevant by newer, more powerful instructions.
While a new PPC processor might be designed to only support VSX, it seems unlikely that IBM would want to do that.
You are certainly right in your assertion that VSX is a new group of instructions with only some overlap of older Altivec instructions. That limited duplication of functions and the fact that all former instructions are implemented in Power7 would indicate that IBM wants to continue to support full backward compatibility (as they have done with revisions in the past).

I don't know what you define as a superset, but if Altivec is equivalent to Intel MMX , then VSX can be see as an analog of the later SSE instruction sets.

[ Edited by Jim on 2010/8/10 21:28 ]

One question you might be able to address, Andreas. Why does everyone discount the idea of Power7 being moved into mainstream markets? When Apple required something more advanced than the G4 level processor, the processors that were eventually designated as G5s were designed incorporating features from higher end Power systems. Even the mass market Cell architecture gains some power from similar incorporations.
If IBM were again to target a large consumer market, why wouldn't they base the product on their most powerful design yet? Isn't that sort of what they've done in the past?

[ Edited by Jim on 2010/8/11 2:19 ]

> I don't know, Andreas. From that statement, I would gather that all
> floating point operations are performed by one hardware unit designed
> the execute all three of sets of instructions.

Read further: "The VSU is the combination of the Altivec execution unit and the 4 FPUs." I read it as the VSU consisting of smaller (sub-)units like for instance the AltiVec unit. But maybe I'm just reading it wrong and it means that the VSU is now what "the Altivec execution unit and the 4 FPUs" had been before, i.e. in former implementations like POWER4/5/6 or PPC970.

> Therefore, VSX isn't a superset of the VMX/Altivec instructions

Yes, that's what I concluded, regardless of VSX and AltiVec being two distinctive physical units or being both executed by just one single unit.

> While a new PPC processor might be designed to only support VSX,
> it seems unlikely that IBM would want to do that.

Yes, but it's not only IBM I'm looking at. See (last sentence):

https://morph.zone/modules/newbb_plus/viewtopic.php?topic_id=7001&forum=3&post_id=74716#74716

> I don't know what you define as a superset

http://en.wikipedia.org/wiki/Subset#Definitions

> but if Altivec is equivalent to Intel MMX , then VSX can be
> see as an analog of the later SSE instruction sets.

That sounds reasonable.

> Why does everyone discount the idea of Power7 being moved into
> mainstream markets?

Is anybody really doing this? :-) While the POWER7 "as is" is definitely not suited for our market(s) a trimmed down (features, power usage, cost) version surely could be. That's exactly what IBM did with the POWER4 after all.

> When Apple required something more advanced than the G4 level
> processor, the processors that were eventually designated as
> G6s were designed incorporating features from higher end
> Power systems.

I take it you mean "G5", not "G6". And yes, the PPC970 aka G5 is a trimmed down POWER4.

> Even the mass market Cell architecture gains some power
> from similar incorporations.

BigGun says that the Cell PPE architecture (while being way older, so it's probably the other way round) is related to the POWER6 architecture:

http://amigaworld.net/modules/newbb/viewtopic.php?topic_id=29336&forum=2&start=180#504967

> If IBM were again to target a large consumer market, why wouldn't
> they base the product on their most powerful design yet? Isn't that
> sort of what they've done in the past?

Yes, exactly. But the real question is: Are IBM to target a large consumer market ever again with Power Architecture (not counting developments solely done for Microsoft or such)? :-)
However, there is something going at IBM regarding alleged trimmed down POWER7 cores:

https://morph.zone/modules/newbb_plus/viewtopic.php?topic_id=6268&forum=11&post_id=75659#75659

I'm not sure if The Register is right though, because POWER7 is an out-of-order design while the A2 seems to be in-order. But the A2 core based PowerEN processor doesn't seem to be suited for our market(s) either, unfortunately.

No, I think I've seen mention of the A2 before and the impression I got was that IBM had designed it for specialized tasks like the network processors that Freescale has focused on.

Lately it seems like a lot of the PPCs introduced aren't really well suited to our market. Its become hard to argue with AOS fans about the PA6T (not that I try to), when floating point support is so weak on a large number of other new PPCs that have been introduced.

Thanks for pointing out the error on that post. I corrected it as, obviously, there was never a G6.

[ Edited by Jim on 2010/8/11 2:20 ]

[ Edited by Jim on 2010/8/11 2:45 ]