Addendum:

> Regarding future QorIQ LS chips based on Power Architecture:
> "Freescale isn’t abandoning the PowerPC architecture it has championed in the past"
> http://gigaom.com/2013/10/16/freescale-puts-arm-cores-to-work-running-the-internet-of-things/

http://www.freescale.com/files/training/doc/dwf/DWF13_APF_NET_T0795.pdf is a nice presentation from April 2013 I just stumbled upon now. Interesting things in it (among others):

Page 8:

"We absolutely stay committed to our Power Architecture and our new e6500 core delivers an unmatched performance/power ratio for the years to come. We continue to invest in this area. [...] We will pick the right core for the right segment/application in alignment with our customers and networking expertise. [...] ARM high end cores have been part of FSL portfolio for years and require minimal incremental investment to leverage for Networking
Freescale will use standard ARM offering where possible
Freescale has a fully negotiated architectural license ready to exercise if need"

Page 10:

Core roadmap until 2015 shows Cortex-A53 ("Apollo") and Cortex-A57 ("Atlas") as well as the e6501 core (adding virtualization interrupts) for 2013/2014, all in the current 28nm process. For 2015, two new cores in 20nm process are shown. I believe that at least the higher performance one ("NGC" with multithreading, higher single-thread performance, directory snoop filters, low-latency clustered accelerators) is supposed to be a new Power Architecture core succeeding the e6500/e6501 core. The lower performance one ("Helios") may be ARM (which would mean a not yet announced core by ARM Ltd.) or Power Architecture.

Page 22:

QorIQ LS2045P:
- 4 x e5500 at 1.5 GHz
- 2 x DDR4
- 6 x PCIe 3.0
- 2 x SATA3
- 2 x USB 3.0
- 8 x 10GbE
- 16 SerDes lanes (8 for networking, 8 for PCIe)
- LCD controller (DIU)

Page 24:

QorIQ LS3400P:
- 20 x e6500 at 1.5 GHz
- 4 x DDR3
- 6 x PCIe 3.0
- 2 x SATA3
- 2 x USB 3.0
- 2 x 100/40GbE
- 24 SerDes lanes (12 for networking, 12 for PCIe)

Page 26:

Mention of T3-Series.

Page 33:

Mention of QorIQ T4400, which should have 20 e6500 cores.


Edit:
http://2014ftf.ccidnet.com/pdf/0016.pdf (page 14/15) from May 2014 has the information that QorIQ LS3 series will have "ARM and Power Architecture cores".

[ Edited by Andreas_Wolf 29.10.2014 - 11:31 ]

How much longer will we have to wait for Qualcomm's Snapdragon APQ8084 chipset?

> How much longer will we have to wait for Qualcomm's Snapdragon APQ8084 chipset?

Wikipedia says Q1 2014 for samples:
http://en.wikipedia.org/wiki/Snapdragon_%28system_on_chip%29#Snapdragon_805

Qualcomm announced last month that the Snapdragon 805 (which includes the 8084) was "sampling now and expected to be available in commercial devices by the first half of 2014":
http://www.qualcomm.com/media/releases/2013/11/20/qualcomm-technologies-announces-next-generation-qualcomm-snapdragon-805

The Linley Group reported three weeks ago that the chip was "already sampling to lead customers" and that they expected it "to appear in phones and tablets in 3Q14":
http://www.linleygroup.com/newsletters/newsletter_detail.php?num=5086

So about the same time as the ARM Cortex A53 based products appear.
Interesting, so the 32 bit products will lead in performance.

Update:

> Figure for Swift substantiated and figures for Cortex-A53 and Cortex-A57 added

New list of DMIPS per MHz and core figures (added Cortex-A12 and specified different Krait types):

ARM Cortex-A7: 1.9
ARM Cortex-A8: 2.0
Qualcomm Scorpion: 2.1
ARM Cortex-A53: 2.3
Marvell Sheeva PJ4: 2.4
ARM Cortex-A9: 2.5
Marvell Sheeva PJ4B: 2.6
ARM Cortex-A12: 3.0
Qualcomm Krait 200: 3.1
Qualcomm Krait: 3.3
Qualcomm Krait 300/400: 3.4
Qualcomm Krait 450: 3.5
Broadcom Brahma15: 3.5 (unsure whether or not this core is just ARM Cortex-A15)
Apple Swift: 3.5
ARM Cortex-A15: 3.5
ARM Cortex-A57: 4.1...4.8 (depending on implementation)

Does anybody have DMIPS figures for the Apple Cyclone or the Applied Micro X-Gene?

So if the A57 is slower, the 32 bit A15 will still lead even when the A57 is introduced.
Curious.

>> ARM Cortex-A15: 3.5
>> ARM Cortex-A57: 4.1...4.8 (depending on implementation)

> So if the A57 is slower, the 32 bit A15 will still lead even when the A57 is introduced.
> Curious.

The Cortex-A15 is specified for a maximum clock rate of 2.5 GHz (while current chips using that core don't exceed 1.9 GHz). Even if we take the slowest figure of 4.1 DMIPS for the Cortex-A57, it will take a 2.1 GHz Cortex-A57 to beat a 2.5 GHz Cortex-A15. Do you think the Cortex-A57 will be introduced with a clock rate below 2.1 GHz?

The introductory speeds I am being quoted for the A53 are around 1.4 GHz.
While I do expect to see the A57 pushed higher, whether it will make it to (or above) 2.1 is questionable.

Quote:

>> Do you think the Cortex-A57 will be introduced with a clock rate below 2.1 GHz?

> whether it will make it to (or above) 2.1 is questionable.

No Dhrystone, but more real-world comparison by ARM Ltd. between Cortex-A57 and Cortex-A15:

http://www.arm.com/images/A57performance_webpage.png

Yep, pretty vague.

But it looks like 64 bit will do OK.
The jump is not that surprising considering the difference between the A9 and the A15.
And the A9 is no slouch.

Update:

> Denver in 2015:
> https://morph.zone/modules/newbb_plus/viewtopic.php?topic_id=8783&forum=3&start=54

...or even in 2014 with Tegra K1 ("Tegra 5", "Logan") still?

"Tegra K1 is offered in two pin-to-pin compatible versions. [...] The second version uses a custom, NVIDIA-designed 64-bit dual Super Core CPU. This CPU (codenamed "Denver") delivers very high single-thread and multi-thread performance. It is based on the ARMv8 architecture [...]. [...] the 64-bit version is expected in devices in the second half of the year."
http://nvidianews.nvidia.com/Releases/NVIDIA-Unveils-Tegra-K1-a-192-Core-Super-Chip-That-Brings-DNA-of-World-s-Fastest-GPU-to-Mobile-a8a.aspx

"The Denver cores (and the rest of the SoC) are fabricated on TSMC’s 28nm HPM process and be clocked at up to 2.5GHz."
http://www.extremetech.com/computing/174023-tegra-k1-64-bit-denver-core-analysis-are-nvidias-x86-efforts-hidden-within

Well Andreas,
It promises to be an interesting year.
Curiously enough, some PPCs will still hold an edge over even the latest ARM designs (in particular in the number of threads possible).
But with these two jumps, 64 bit and higher clock speeds, the ARM ISA is finally starting to be really competitive with other mainstream ISAs.

Quote:

Dear THM, its good to hear overall good news that PPC isn`t that as dudo, as many have claimed and laughed. Its not faster player too, but let it become better.

Surely, that doesn`t mean ANYTHING automatically until we support some CPU and MOS needs to add AMCC now and maybe Freescale soon (so X2000 should be a viable target too ... ).

I really like ARMs but was bitterly dissapointed that dual core Prestigio tablet was unable to drive Linux and Android 4.x is ... just not for me.

ARM is the future, and M$ supporting another ISA after WinNT PPC/MIPS is a clear sign of change. Once Office goes Linux, M$ will be more widespread.

Only good news is that Windows 8.x is a complete disaster - a mobile phone OS offered to desktops. That is shoot in a foot at least for I.

AS of MOS supporting AMCC, even PWREfficient, dual core G5 and Freescale while doing the ARM transition would be my suggestion. And not because I am ex-OS4 user, but because that strenghtens MOS. OK?

Quote:

He is actually correct on this.
Strengthening our current system would have advantages.
I for one, am tired of the 'hobbyist OS" label.
I can already do most of my work from a MorphOS machine.
An alternative box could use the unused cores and memory that we already have at our disposal.

So it begins.

4 to 8 A57 cores >= 2GHz
8 x SATA3
2 x PCIe 3 x4 slots (or 1 x x8)
Up to 128GB DDR3/4 RAM
Micro ATX

Except for the limited expansion, that is nice.

Update:

> Freescale going Cortex-A53 for i.MX (and Cortex-A57 for QorIQ):
> http://media.freescale.com/phoenix.zhtml?c=196520&p=irol-newsArticle&ID=1789227
> Maybe they'll simply skip Cortex-A15 for i.MX?

Indeed they will (and also Cortex-A12 for that matter). Next after current i.MX6 with Cortex-A9 will be i.MX7 with Cortex-A7 and then i.MX8 with Cortex-A53:

http://www.freescale.com/files/training/doc/dwf/DWF13_APF_CON_T0838.pdf (pages 3 to 5)

Now I get a little bit confused....ARM is relasing planning Cortex-A17 (over A12) ...


....ok..A12 has no big.LITTLE...

[ Edited by scrAb_ 11.02.2014 - 13:06 ]

Update:

> New list of DMIPS per MHz and core figures (added Cortex-A12 and specified
> different Krait types)

Figures for Cortex-A12 and Cortex-A15 substantiated and figures for Cortex-A17 added (all according to AnandTech):

ARM Cortex-A7: 1.9
ARM Cortex-A8: 2.0
Qualcomm Scorpion: 2.1
ARM Cortex-A53: 2.3
Marvell Sheeva PJ4: 2.4
ARM Cortex-A9: 2.5
Marvell Sheeva PJ4B: 2.6
Qualcomm Krait 200: 3.1...3.3 (depending on source)
Qualcomm Krait: 3.3
Qualcomm Krait 300: 3.4
ARM Cortex-A12: 3.0...3.5 (depending on source)
Qualcomm Krait 400: 3.4...3.6 (depending on source)
Qualcomm Krait 450: 3.5
Broadcom Brahma15: 3.5 (unsure whether or not this core is just ARM Cortex-A15)
Apple Swift: 3.5
ARM Cortex-A15: 3.5...4.0 (depending on source)
ARM Cortex-A17: 4.0
Applied Micro Potenza: 4.2
ARM Cortex-A57: 4.1...4.8 (depending on implementation)
ARM Cortex-A72: 4.7...5.0 (depending on implementation)

Does anybody have DMIPS figures for the Apple Cyclone or the Applied Micro X-Gene?


Edit: now also taking these into account:
http://en.wikipedia.org/wiki/Comparison_of_ARMv7-A_cores
Edit2: added Cortex-A72
http://en.wikipedia.org/wiki/Comparison_of_ARMv8-A_cores
Edit3: added X-Gene
Edit4: renamed X-Gene as Potenza

[ Edited by Andreas_Wolf 23.04.2016 - 11:07 ]

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Quote:

That figure is probably wrong and appears to have been made up. The A17 is faster than the A12 but DMIPS won't be the best benchmark to show it.

Quote:

No idea but I've seen both compared to Haswell in performance per clock.

Update:

> Core roadmap [...] shows [...] the e6501 core (adding virtualization interrupts) for 2013/2014

First product with e6501 core announced:

http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=B3421
http://media.freescale.com/phoenix.zhtml?c=196520&p=irol-newsArticle&ID=1900438

A PPC for the 4G market?
I am confused as to the market for this component.

> A PPC for the 4G market? I am confused as to the market for this component.

We already talked about the QorIQ Qonverge there:

https://morph.zone/modules/newbb_plus/viewtopic.php?forum=11&topic_id=8901&start=27

More reading material:

http://www.freescale.com/webapp/sps/site/overview.jsp?code=SRVCPROV
http://www.freescale.com/webapp/sps/site/overview.jsp?code=QORIQ_QONVERGE
http://www.freescale.com/files/32bit/doc/brochure/BRSMALLCELLS.pdf
http://www.freescale.com/files/32bit/doc/white_paper/QORIQQONVERGEWP.pdf
http://www.freescale.com/files/rf_if/doc/white_paper/SMCELLRFWP.pdf
http://www.freescale.com/files/industrial/doc/brochure/ENEAUPDTCSTY.pdf
http://www.freescale.com/files/training/doc/dwf/DWF13_JNK_NET_T0991.pdf

In short, the QorIQ Qonverge is a series of base station-on-chips for the wireless infrastructure service provider market.