eclipsis: Processor candidate
  • Paladin of the Pegasos
    Paladin of the Pegasos
    jcmarcos
    Posts: 1178 from 2003/3/13
    From: Pinto, Madrid ...
    From the very little information I've found about this project, I can only guess the eclipsis should be a pocket sized Pegasos. So I stumbled upon this nifty new PowerPC processor from Motorola, that might bring some interesting discussion. Here are the specs:

    MPC5200 : 32 Bit Embedded Processor

    The MPC5200 is a highly integrated, cost-effective, 760 MIPS embedded PowerPCTM processor that operates under 850 mW at 400 MHz. The MPC5200 serves the processing-intensive network gateway, automotive, Internet access, industrial automation, image detection/analysis, and electronic/medical instrumentation markets. With its successful foundation in the automotive/telematics market via the mobileGTTMalliance and platforms, all markets can now enjoy extended temperature, automotive qualification, and life cycles typically demanded in that industry. Based on a 400 MHz MPC603e core with an integrated Floating Point Unit (FPU), the MPC5200 offers the following:

    - 760 Dhrystone 2.1 MIPS.
    - 5 stage pipeline.
    - Double Precision FPU.
    - Less than 850 mW power consumption.
    - Low-cost 272-pin package.
    - Works from -40 to 85 Celsius degrees (automotive qualified).
    - Long-term availability.

    The 760 MIPS FPU-based MPC5200 was designed for fast data throughput and processing. The integrated BestComm DMA controller offloads the main MPC603e core from I/O intensive data transfers. An integrated Double Data Rate (DDR) memory controller accelerates data access with an effective memory bus speed of 266 MHz. A high-speed PCI interface backed by the BestComm DMA controller and DDR support enables high-speed data transfers in and out of the MPC5200. The MPC5200 is manufactured in 0.13 micron technology and supports the following on-chip peripheral interfaces:

    - PCI.
    - ATA.
    - 10/100 BaseT Ethernet.
    - USB 1.1 Host (two).
    - Programmable Serial Controllers (six).
    - Serial Peripheral Interface (SPI).
    - I2C (two).
    - I2S (up to three).
    - CAN 2.0 A/B (two).
    - J1850 BDLC-D.
    - GPIO (up to 56).
    - 8 Timers.

    An evaluation kit and a development platform are both offered.
  • »31.07.03 - 14:35
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  • Order of the Butterfly
    Order of the Butterfly
    merko
    Posts: 328 from 2003/5/19
    Looks nice. On a related note, does anyone happen to know
    approximately how many Wh's a modern battery (cell phone type) will
    deliver?
  • »01.08.03 - 12:07
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  • Priest of the Order of the Butterfly
    Priest of the Order of the Butterfly
    Posts: 979 from 2003/6/28
    uhm
  • »05.09.04 - 15:44
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  • Priest of the Order of the Butterfly
    Priest of the Order of the Butterfly
    bbrv
    Posts: 750 from 2003/2/14
    From: Earth
    We still have it in mind...

    eclipsis

    ...and here too on the handheld end of the spectrum...

    HERE and HERE, but we do have a few things to do first...:-D

    R&B :-)
  • »05.09.04 - 18:24
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  • Priest of the Order of the Butterfly
    Priest of the Order of the Butterfly
    Posts: 979 from 2003/6/28
    Interesting! It sounds as "the attack of the PowerPC processors: giving more processing power everywhere" or something, performed by captain pegasos :lol:
  • »05.09.04 - 18:41
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  • Priest of the Order of the Butterfly
    Priest of the Order of the Butterfly
    Posts: 979 from 2003/6/28
    @bbrv

    Interesting, but a lot of frames, why not use tables instead? ;-)
  • »05.09.04 - 19:16
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  • Leo
  • Order of the Butterfly
    Order of the Butterfly
    Leo
    Posts: 419 from 2003/8/18
    @Timofonic (did I spell it right this time ? :)):

    <!--Web Designer -- Aaron B. Case -- Jan 2000 -->

    => more than 4 years ago frames were used everywhere, that's not surprising :)

    Regards,
    Leo.

    [ Edited by Leo on 2004/9/5 20:46 ]
    Nothing hurts a project more than developers not taking the time to let their community know what is going on.
  • »05.09.04 - 20:45
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