Yokemate of Keyboards
Posts: 12225 from 2003/5/22
From: Germany
Update:
>>> According to the block diagram, there's SATA2 connected (for whatever reason)
>>> and the 4 PCIe controllers are configured with 9 lanes as x4-gen3 (MXM/GPU)
>>> x2-gen2 (4×SATA3) x2-gen2 (MiniPCIe/LTE/WiFi) x1-gen2 (4×USB3).
>>> I just had a closer look at the SerDes lane assignment options of the
>>> T2080: [...] To me it seems the T2080 offers three better PCIe options,
>>> so that only the fourth-best option would be the one chosen by ACube:
>>> 14 PCIe lanes (x4 x4 x4 x2) without SATA2 (using 0xBC + 0x1F config)
>>> 12 PCIe lanes (x4 x4 x2 x2) with SATA2 (using 0xBC + 0x15/0x16 config)
>>> 11 PCIe lanes (x4 x4 x2 x1) without SATA2 (using 0xC8/0xD6 + 0x1F config)
>>> 09 PCIe lanes (x4 x2 x2 x1) with SATA2 (using 0xC8/0xD6 + 0x15/0x16 config)
>> Thanks, good analysis. I'll relay it.
> According to the
most recent block diagram, it seems ACube switched
> to the "11 PCIe lanes (x4 x4 x2 x1) without SATA2" option, configured as
> x4-gen3 (MXM/GPU) x4-gen2 (LTE/WiFi) x2-gen2 (4×SATA3) x1-gen2 (2×USB3).
According to the
most recent block diagram, it seems ACube finally took my advise (hehe) and switched to the "14 PCIe lanes (x4 x4 x4 x2) without SATA2" option, configured as x4-gen3 (MXM/GPU) x4-gen3 (M.2) x4-gen2 (LTE/WiFi/2×USB3/Audio) x2-gen2 (2×SATA3).