I continue with interesting discussion started ( a liitle offtopic ) here:
iMac G5 overclockingCode:
Little terminology corner:
CPU bus: = Processor Interconnect ( IBM terminology ) = Elastic Interface ( Apple schematics terminology ) = Processor interface bus ( Apple bussiness terminology )
Northbridge: = U4 ( Apple bussiness ) = CP945 ( IBM ) = Kodiak ( Apple schematics )
Fortunatelly, I receive iMac iSight G5 ( A1145 ) and iMac G5 A1058 (which is very probably version overclocked in above links ) schematics.
I can confirm, that resistors responsible for CPU bus clock configuration 3:1 -> 2:1 are:
iMac G5 1.8 GHz A1058: R3012 -> R3028, exactly like mentioned in above links
iMac G5
iSight 2.1 GHz A1145:
R4712 -> R4728Accordind to Northbridge and CPU manuals, the CPU bus clock domain is independent from other clock domains, so CPU speed not change with change of CPU bus speed ( in opposite of G3+G4 overclocking, where CPU frequency derives from bus frequency).
So, all this is theory. In praxis there still can remain risk of damage, because of:
- inappropriate version of real iMac iSight and schematics (not too big risk)
- Northbridge in iMac can have lower "Speed Classification", i.e. maybe in real is not 1.05 GHz capable
- insufficient cooling after bus overclocking
- damage during mounting / dismounting / soldering
- other things I didn't notice
[ Edited by sailor 20.05.2022 - 08:20 ]AmigaOS3: Amiga 1200
AmigaOS4: Micro A1-C, AmigaOne XE, Pegasos II, Sam440ep, Sam440ep-flex, Sam460LE, AmigaOneX1000
MorphOS: Efika 5200b, Pegasos I, Sam460LE, Pegasos II, Powerbook G4, Mac Mini, iMac G5, Powermac G5 Quad