>The VSU (Vector Scalar Unit) is the hardware that implements the Altivec, VSX and scalar floating point instructions.>

I don't know, Andreas. From that statement, I would gather that all floating point operations are performed by one hardware unit designed the execute all three of sets of instructions.
While these instructions could be implemented separately, they don't appear to have been in Power7.
Therefore, VSX isn't a superset of the VMX/Altivec instructions, and would appear to act like many of the instructions added over the years to X86 processors.
There are many old X6 instructions (including many old math coprocessor routines) that remain in the architecture (and allow for backward compatibility) that have been rendered irrelevant by newer, more powerful instructions.
While a new PPC processor might be designed to only support VSX, it seems unlikely that IBM would want to do that.
You are certainly right in your assertion that VSX is a new group of instructions with only some overlap of older Altivec instructions. That limited duplication of functions and the fact that all former instructions are implemented in Power7 would indicate that IBM wants to continue to support full backward compatibility (as they have done with revisions in the past).

I don't know what you define as a superset, but if Altivec is equivalent to Intel MMX , then VSX can be see as an analog of the later SSE instruction sets.

[ Edited by Jim on 2010/8/10 21:28 ]