Yokemate of Keyboards
Posts: 11762 from 2003/5/22
From: Germany
> It's apparent that VSX is an extention of VMX. I got confused because those few times
> I read about VSX, I missed -or they omitted- VMX mentioned. And until now -that is
> until you made me read more about it :) - I thought they were distinctive units.
I found some more information there:
http://www.power.org/events/Power7/Performance_Guide_for_HPC_Applications_on_Power_755-Rel_1.0.1.pdf
Pages 7/8:
"A new single instruction multiple data (SIMD) instruction set called VSX is introduced in the POWER7 processor. This is in addition to the AltiVec SIMD instruction set which was previously introduced in the PPC970-based system, the JS20 blade server."
Page 69:
"The Vector-Scalar floating point eXtension architecture (VSX) has been developed by IBM to extend SIMD support to include two independent 2-way-SIMD double precision floating point (FP) operations per cycle. The Altivec SIMD features are a subset of VSX. [...] For POWER systems, the "VSX" term has been used to highlight the double precision arithmetic instructions supported by the POWER7 hardware, with "Altivec" reserved for the older 32-bit precision arithmetic SIMD support."
Page 71:
"The POWER7 architecture continues to support the Altivec instruction set, and extends support to double precision floating point operations with the VSX instruction set. The VSU (Vector Scalar Unit) is the hardware that implements the Altivec, VSX and scalar floating point instructions. There are no longer separate scalar FPUs in the POWER7 core. [...] The VSU is the combination of the Altivec execution unit and the 4 FPUs. It is divided into two independent pipes, each of which can execute one instruction per cycle. Each pipe can independently execute a scalar double-precision FP op or a SIMD double-precision FP op. All SIMD operations are on 16-byte vectors of data. Mimicking the behavior of the original Altivec unit, pipe0 handles the simple FX, complex FX and 4-way SIMD single-precision FP ops and pipe1 handles the Altivec permute ops."
Page 83:
"While Altivec and VSX have differences in programming details, they have similar criteria when it comes to deciding how to convert a candidate (scalar) program to exploit SIMD instructions to increase performance."
Page 86:
"The vector multiply-add intrinsic for double precision arithmetic (VSX) is the same as for single precision (Altivec). Not all corresponding VSX and Altivec instructions share the same intrinsic."
Taking these notes into account, my conclusions are as follows:
1. VSX and VMX/AltiVec are really two distinctive physical units.
2. The features of VSX represent a superset of the features of VMX/AltiVec.
3. The VSX instruction set is *not* a superset of the VMX/AltiVec instruction set. In fact, the instruction sets are different (with some overlapping). That means that a processor implementing VSX does not necessarily implement VMX/AltiVec. A program using VMX/AltiVec instructions will therefore not run on a processor that implements just VSX, but can be changed on source code level to use VSX instead.
Any objections? ;-)