Addendum:

> "for the 460EX, I am not surprised things aren't working with KMS & DRI2...
> the 460 is not cache coherent"
> http://lists.freedesktop.org/archives/dri-devel/2012-February/019157.html
>
> "You will run into additional problems with 460 due to the fact that it's not
> cache coherent for DMA."
> http://lists.ozlabs.org/pipermail/linuxppc-dev/2012-March/096888.html
>
> "DMA on 46x isn't cache coherent. The DRM plays interesting games with
> mapping/unmapping pages for DMA by the chip and I don't think we have the
> right hooks to do the appropriate cache flushing on these guys"
> http://lists.ozlabs.org/pipermail/linuxppc-dev/2012-March/096925.html
>
> Is this contributing to the porting difficulty? I remember that
> Piru once said that MorphOS required cache coherency which he presented
> as reason that MorphOS couldn't be ported to MPC512x. If a MorphOS port
> to PPC460EX lacking cache coherency is possible, would that mean that a
> port to MPC512x is possible as well?

http://www.acube-systems.biz/index.php?page=news&id=131

And in more detail:

"on the 460ex CPU, coherency between memory and L2 cache can be managed via hardware snoop mechanism. Under some circumstances, the L2 controller may miss snoop-able write requestes and cause incoherency between L2 cache and main memory. To avoid this potential problem, the AOS4.1 kernel on Sam460 disable L2 cache write by default, slightly degrading performance. This utility enables L2 cache write and thus increases a little system performance. To be noted: IT MAY CAUSE SYSTEM INSTABILITY AND/OR DATA CORRUPTION if for some reason the OS perfom some operation which can cause incoherency between L2 cache and main memory, use it at your own risk ! [...] The best use of this utility is to run it before any intensive task (for example playing a movie) then disable it, and not leaving it enabled all the time, to avoid any potential coherency problem."
http://os4depot.net/?function=showfile&file=utility/shell/l2cache.lha