AFAIK information about the number of PCIe (note the "e", legacy PCI is not supported) lanes is not public yet. What's been revealed is the number of SerDes lanes, of which some will be configurable as PCIe lanes (16 at best in case of T4240, 12 at best in case of T4160; but due to SATA controllers will have to be decreased by 1 or 2 in both cases), and the type and number of the PCIe controllers:
