• Cocoon
    Cocoon
    cha05e90
    Posts: 52 from 2010/6/23
    @pega-1

    I hope this might be useful information, this is what PCITool outputs for my SiL3114 controller (slot 05) and additionally my VIA USB2.0 controller (slot 06, which, btw, doesn't work well with Poseidon...)

    $VER: PciTool 2.3 (18.11.2010) Marian "MaaG^dA" Guc
    Pci.ids database: 2010-11-07 03:15:01

    Driver: openpci.library v2.1
    Detected: Pegasos Bus <Pegasos II>

    ================================
    Pci Device: Slot 05, Function 00
    Vendor 0x1095 <Silicon Image, Inc.> Device 0x3114 <SiI 3114 [SATALink/SATARaid] Serial ATA Controller>
    Class Code 0x01 <Mass storage controller>
    Sub-Class 0x04 <RAID bus controller>
    Programming Interface 0x00
    Revision 0x02, Cache Line Size 0, Latency 0, Bus Master Capable
    PCI_COMMAND 0x0000 (Command Register)
    PCI_STATUS 0x02B0 (Status Register)
    -> 4: Support new capabilities linked List
    -> 5: Support 66MHz PCI bus
    -> 7: Fast Back-To-Back Capable
    -> 10,9:DEVSEL# timing: 01 <MEDIUM>
    PCI_BIST 0x00 (Built In Selftest Register)
    ------------------------------
    Header Type:0x00 <Normal PCI Bridge : Single-function device>
    PCI_SUBSYSTEM_VENDOR_ID 0x1095 PCI_SUBSYSTEM_ID 0x7114
    IRQ Linie=9, Interrupt Pin=0x01 <INTA#>, Min.Grant=0, Max.Latency=0
    Capabilities List(CL)[0x60]=0x06220001:
    +CL_ID:0x01 <PCI Power Management Interface>
    :PMC 0x0622 (Power Management Capabilities Register)
    -> 0-2:VERSION 2 (Version bits)
    -> 5: DSI (Device Specific Initialization)
    -> 8-6: AUX_POWER 000 <0mA> (The 3,3Vaux auxilliary current power)
    -> 9: D1 (D1 power state support)
    -> 10:D2 (D2 power state support)
    :PMCSR 0x4000 (Power Management Control and Status Register)
    -> 1,0: PowerState 00 <D0> (Current power state)
    -> 12-9:Data_Select 0x00 (Select data from Data register and Data_Scale field)
    -> 14,13:Data_Scale 10 <x0.01> (Scale factor to apply to contents of Data register)
    I/O Base Addr.0: 0xEFFFC000 - 0xEFFFCFFF 4 kbytes
    I/O Base Addr.1: 0xEFFFB000 - 0xEFFFBFFF 4 kbytes
    I/O Base Addr.2: 0xEFFFA000 - 0xEFFFAFFF 4 kbytes
    I/O Base Addr.3: 0xEFFF9000 - 0xEFFF9FFF 4 kbytes
    I/O Base Addr.4: 0xEFFF8000 - 0xEFFF8FFF 4 kbytes
    Mem.Base Addr.5: 0xEFFF7000 - 0xEFFF7FFF 4 kbytes
    CardBus CIS Pointer: 0x00000000
    -> 2-0: 000 <Adress space in device's device-specific configuration space>
    -> 0x00000000 <Offset for address space>
    ROM Address: 0xEFF77000 - 0xEFFF6FFF, Size: 512 kbytes

    ================================
    Pci Device: Slot 06, Function 00
    Vendor 0x1106 <VIA Technologies, Inc.> Device 0x3038 <VT82xxxxx UHCI USB 1.1 Controller>
    Class Code 0x0C <Serial bus controller>
    Sub-Class 0x03 <USB Controller>
    Programming Interface 0x00 <UHCI>
    Revision 0x61, Cache Line Size 0, Latency 22, Bus Master Capable
    PCI_COMMAND 0x0007 (Command Register)
    -> 0: I/O Access Enable
    -> 1: Memory Access Enable
    -> 2: Bus Mastering Enable
    PCI_STATUS 0x0210 (Status Register)
    -> 4: Support new capabilities linked List
    -> 10,9:DEVSEL# timing: 01 <MEDIUM>
    PCI_BIST 0x00 (Built In Selftest Register)
    ------------------------------
    Header Type:0x80 <Normal PCI Bridge : Multi-function device>
    PCI_SUBSYSTEM_VENDOR_ID 0x1106 PCI_SUBSYSTEM_ID 0x3038
    IRQ Linie=9, Interrupt Pin=0x01 <INTA#>, Min.Grant=0, Max.Latency=0
    Capabilities List(CL)[0x80]=0x7E0A0001:
    +CL_ID:0x01 <PCI Power Management Interface>
    :PMC 0x7E0A (Power Management Capabilities Register)
    -> 0-2:VERSION 2 (Version bits)
    -> 3: CLOCK (PCI clock required for PME#)
    -> 8-6: AUX_POWER 000 <0mA> (The 3,3Vaux auxilliary current power)
    -> 9: D1 (D1 power state support)
    -> 10:D2 (D2 power state support)
    -> 11:PME# from D0
    -> 12:PME# from D1
    -> 13:PME# from D2
    -> 14:PME# from D3 (hot)
    :PMCSR 0x0000 (Power Management Control and Status Register)
    -> 1,0: PowerState 00 <D0> (Current power state)
    -> 12-9:Data_Select 0x00 (Select data from Data register and Data_Scale field)
    -> 14,13:Data_Scale 00 <---> (Scale factor to apply to contents of Data register)
    I/O Base Addr.4: 0xEFF76000 - 0xEFF76FFF 4 kbytes
    CardBus CIS Pointer: 0x00000000
    -> 2-0: 000 <Adress space in device's device-specific configuration space>
    -> 0x00000000 <Offset for address space>

    ================================
    Pci Device: Slot 06, Function 01
    Vendor 0x1106 <VIA Technologies, Inc.> Device 0x3038 <VT82xxxxx UHCI USB 1.1 Controller>
    Class Code 0x0C <Serial bus controller>
    Sub-Class 0x03 <USB Controller>
    Programming Interface 0x00 <UHCI>
    Revision 0x61, Cache Line Size 0, Latency 22, Bus Master Capable
    PCI_COMMAND 0x0007 (Command Register)
    -> 0: I/O Access Enable
    -> 1: Memory Access Enable
    -> 2: Bus Mastering Enable
    PCI_STATUS 0x0210 (Status Register)
    -> 4: Support new capabilities linked List
    -> 10,9:DEVSEL# timing: 01 <MEDIUM>
    PCI_BIST 0x00 (Built In Selftest Register)
    ------------------------------
    Header Type:0x80 <Normal PCI Bridge : Multi-function device>
    PCI_SUBSYSTEM_VENDOR_ID 0x1106 PCI_SUBSYSTEM_ID 0x3038
    IRQ Linie=9, Interrupt Pin=0x02 <INTB#>, Min.Grant=0, Max.Latency=0
    Capabilities List(CL)[0x80]=0x7E0A0001:
    +CL_ID:0x01 <PCI Power Management Interface>
    :PMC 0x7E0A (Power Management Capabilities Register)
    -> 0-2:VERSION 2 (Version bits)
    -> 3: CLOCK (PCI clock required for PME#)
    -> 8-6: AUX_POWER 000 <0mA> (The 3,3Vaux auxilliary current power)
    -> 9: D1 (D1 power state support)
    -> 10:D2 (D2 power state support)
    -> 11:PME# from D0
    -> 12:PME# from D1
    -> 13:PME# from D2
    -> 14:PME# from D3 (hot)
    :PMCSR 0x0000 (Power Management Control and Status Register)
    -> 1,0: PowerState 00 <D0> (Current power state)
    -> 12-9:Data_Select 0x00 (Select data from Data register and Data_Scale field)
    -> 14,13:Data_Scale 00 <---> (Scale factor to apply to contents of Data register)
    I/O Base Addr.4: 0xEFF75000 - 0xEFF75FFF 4 kbytes
    CardBus CIS Pointer: 0x00000000
    -> 2-0: 000 <Adress space in device's device-specific configuration space>
    -> 0x00000000 <Offset for address space>

    ================================
    Pci Device: Slot 06, Function 02
    Vendor 0x1106 <VIA Technologies, Inc.> Device 0x3104 <USB 2.0>
    Class Code 0x0C <Serial bus controller>
    Sub-Class 0x03 <USB Controller>
    Programming Interface 0x20 <EHCI>
    Revision 0x63, Cache Line Size 0, Latency 22, Bus Master Capable
    PCI_COMMAND 0x0007 (Command Register)
    -> 0: I/O Access Enable
    -> 1: Memory Access Enable
    -> 2: Bus Mastering Enable
    PCI_STATUS 0x0210 (Status Register)
    -> 4: Support new capabilities linked List
    -> 10,9:DEVSEL# timing: 01 <MEDIUM>
    PCI_BIST 0x00 (Built In Selftest Register)
    ------------------------------
    Header Type:0x80 <Normal PCI Bridge : Multi-function device>
    PCI_SUBSYSTEM_VENDOR_ID 0x1106 PCI_SUBSYSTEM_ID 0x3104
    IRQ Linie=9, Interrupt Pin=0x03 <INTC#>, Min.Grant=0, Max.Latency=0
    Capabilities List(CL)[0x80]=0x7E0A0001:
    +CL_ID:0x01 <PCI Power Management Interface>
    :PMC 0x7E0A (Power Management Capabilities Register)
    -> 0-2:VERSION 2 (Version bits)
    -> 3: CLOCK (PCI clock required for PME#)
    -> 8-6: AUX_POWER 000 <0mA> (The 3,3Vaux auxilliary current power)
    -> 9: D1 (D1 power state support)
    -> 10:D2 (D2 power state support)
    -> 11:PME# from D0
    -> 12:PME# from D1
    -> 13:PME# from D2
    -> 14:PME# from D3 (hot)
    :PMCSR 0x0000 (Power Management Control and Status Register)
    -> 1,0: PowerState 00 <D0> (Current power state)
    -> 12-9:Data_Select 0x00 (Select data from Data register and Data_Scale field)
    -> 14,13:Data_Scale 00 <---> (Scale factor to apply to contents of Data register)
    Mem.Base Addr.0: 0xEFF74000 - 0xEFF74FFF 4 kbytes
    CardBus CIS Pointer: 0x00000000
    -> 2-0: 000 <Adress space in device's device-specific configuration space>
    -> 0x00000000 <Offset for address space>
    II/G4
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