Freescale is announcing again:

http://media.freescale.com/phoenix.zhtml?c=196520&p=irol-newsArticle&ID=1576370

Seems they really value Altivec again. Question is why they ditched it first then? Anyway, nice new chips. Price will probably be prohibitive and Freescale is not really known to meet their scheduled time lines.

> multithreaded

Nice to see that Freescale realized their SMT plans.

> http://media.freescale.com/phoenix.zhtml?c=196520&p=irol-newsArticle&ID=1576370
> Seems they really value Altivec again.

Yes, it seems that QorIQ AMP is the official moniker of what has so far been on Freescale's revised roadmap as "QorIQ T series" sporting "improvements incorporated in the updated version" of AltiVec.

> Question is why they ditched it first then?

It's surely been a costly and time consuming undertaking to integrate AltiVec with a core derived from e500, so Freescale had hoped to get along without that after they decided to not develop e600 any further. What they obviously didn't anticipate though is that many of their customers very much depend on the presence of a powerful SIMD unit and thus were about to abandon Freescale as a supplier and go to Intel instead. I'd regard the inclusion of AltiVec into QorIQ as a measure to some kind of damage control. Needless to say that I appreciate this wise decision to re-introduce AltiVec of course.

Edit: statement from Glenn Beck, marketing manager for aerospace, defense and single board computing within Freescale's Networking Processor Division, regarding the ditching of AltiVec (from the AltiVec video linked below at 3:16):
"When it was not on the roadmap we did it for a reason. It was because of market pressures. But those pressures have changed. We're clearly seeing the need in terms of printing and imaging, video surveillance, analytics inside of surveillance, and even in the networking world a need for a SIMD engine that complements the scalar processor that is already out there in QorIQ."

I wouldn't know what those "market pressures" that have changed were, though.


Some more resources on the e6500 core and the QorIQ AMP series:

http://www.freescale.com/webapp/sps/site/overview.jsp?code=QORIQ_AMP (product page)
http://www.freescale.com/files/32bit/doc/fact_sheet/QORIQAMPFS.pdf (QorIQ AMP fact sheet)
http://www.freescale.com/files/netcomm/doc/fact_sheet/QORIQOV.pdf (QorIQ P and AMP fact sheet)
http://www.youtube.com/watch?v=A3THXh9qD3o (QorIQ AMP introduction*)
http://www.youtube.com/watch?v=YGM7femV4uA (QorIQ AMP overview**)
http://www.youtube.com/watch?v=wUW74jSIYXg (QorIQ AMP overview)
http://www.youtube.com/watch?v=lOJP2YRr6Uc (e6500 core overview***)
http://www.youtube.com/watch?v=6_cbntPxbck (AltiVec capability)
http://www.youtube.com/watch?v=Vllchtb5mos (e6500 core SMT capability)
http://videos.cache.magnify.net/60X0NG37F35BHBT2-FreescaleEmbargo0621_483_336_384x216.mp4 ****

* Funny claim at 0:42: "Up to 100 GHz Performance" ;-)
** At 1:05: "...the e6500 [...] increases the core performance alone by 2x over the previous generation. [...] We've also increased the frequencies to up to 2.5 GHz..." Is the e5500 repudiated here?
*** That one made me almost fall off my chair. Starting at 3:35 the engineer mentions that dual-threading increases core performance by about 60% while increasing power consumption by only about 30%, from which the interviewer (Freescale's John Dixon, Power and DSP products marketing manager) calculates a 50% relative power saving. Please someone say he didn't really divide 30 by 60 to come to his conclusion. Given my math isn't completely off I'd calculate 1-(1.3/1.6) and end up with a 20% relative power saving. Or did I miss something here?
**** This calculating expert John Dixon from above claims at 0:57: "We also have the reintroduction of AltiVec, which is an enhanced version of our AltiVec that we had in our PowerQUICC products in our previous generations." WTF?


From CEO Rich Beyer's keynote:

"QorIQ AMP [...] is expected to deliver 4x the performance of our current family of products at one-half the power consumption." (page2)

This is of course bollocks. What he probably meant to say is that it delivers 4x the performance at one-half the power consumption *per performance*, which amounts to 2x the power consumption at 2x the power efficiency. 4x the performance at one-half the power consumption would actually amount to *8x* the power efficiency.
This specifically means that the T4240 consumes 60 watts (and not 15 watts as indicated by Beyer) to deliver 4x the performance of the P4080 at 30 watts.

"we are adding virtualization capability" (page 3)

He seems to be unaware that this has already been in there since the e500mc core.

[ Edited by Andreas_Wolf 25.06.2011 - 15:41 ]

Currently at work.
Can you find out if it offers more PCIe lanes than the e5500?
When is its anticipated introduction date?

Jim

yea, I'd like this in a 2.0ghz setup.

> Can you find out if it offers more PCIe lanes than the e5500?

PCIe controllers in a SoC are not dependent on the SoC's core. If I take your question to mean whether the SoCs incorporating the e6500 core will have more PCIe lanes than the P5020 and P5010 then I'm afraid no such information is public yet. The only e6500 based SoC that got announced so far is the T4240, but no too specific information on that.

> When is its anticipated introduction date?

From the press release:

"Freescale will provide more details regarding the T4240 product later this year. The device is planned for initial availability in early 2012."

> I'd like this in a 2.0ghz setup.

I'd prefer this in a 2.5 GHz setup with less cores (T5) ;-)

Update:

> From the press release:
> "Freescale will provide more details regarding the T4240 product later this year.
> The device is planned for initial availability in early 2012."

Already postponed?

"Availability of the royalty-free Mentor Embedded Performance Library for Freescale's AltiVec technology is planned to coincide with initial availability of QorIQ AMP silicon."
http://media.freescale.com/phoenix.zhtml?c=196520&p=irol-newsArticle&ID=1603798

"Library release date: Mid-summer 2012"
http://go.mentor.com/x98s

Update:

>> Can you find out if it offers more PCIe lanes than the e5500?

> PCIe controllers in a SoC are not dependent on the SoC's core. If I take
> your question to mean whether the SoCs incorporating the e6500 core
> will have more PCIe lanes than the P5020 and P5010 then I'm afraid no
> such information is public yet. The only e6500 based SoC that got
> announced so far is the T4240, but no too specific information on that.

"The QorIQ T4240 [...] is the first AMP series device scheduled for release in 2012 and [...] integrates twelve e6500 cores in a single device that are organized into three processor clusters of four cores each. The 24 virtual cores are able to operate at up to 1.8 GHz [...]. New functions of data decompression/compression accelerator [...], Interlaken Look-Aside [...], PCIe 3.0, SR-IOV end point and data center bridging [...] are new with the T4240 processor."
http://www.freescale.com/files/32bit/doc/brochure/PWRARBYNDBITSQIG.pdf (page 3)
http://www.freescale.com/files/32bit/doc/brochure/PWRARBYNDBITS.pdf (page 13)

So while I'm not much wiser regarding the number of PCIe lanes yet (the document linked there mentions "2x 18-Lane SerDes (6GBaud and 11Gbaud)" for the QorIQ T4 but I'm not sure what that implies for PCIe if anything), we now know that it will be PCIe 3.0 lanes, i.e. doubling the per-lane bandwidth of the QorIQ P5's PCIe 2.x lanes.

Update:

> the document linked there mentions "2x 18-Lane SerDes (6GBaud and 11Gbaud)"
> for the QorIQ T4

Sampling of QorIQ AMP T4240 and T4160 got announced for mid-2012, and SerDes is 2x 16-lane and 2x 12-lane respectively.

Press release:
http://media.freescale.com/phoenix.zhtml?c=196520&p=irol-newsArticle&ID=1658255

Product page:
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=T4240

Fact sheet:
http://www.freescale.com/files/32bit/doc/fact_sheet/T4240T4160FS.pdf

Brochure:
http://www.freescale.com/files/32bit/doc/brochure/BRT4FAMI.pdf

Product Brief:
http://www.freescale.com/files/32bit/doc/prod_brief/T4240PB.pdf

Block diagrams:
http://www.freescale.com/files/graphic/block_diagram/T4240_BD_IMG.jpg
http://www.freescale.com/files/graphic/block_diagram/T4160_BD_IMG.jpg

Youtube presentation video:
http://www.youtube.com/watch?v=iO7rYH6qC50

According to the fact sheet, the chips provide "four PCI Express controllers that support varieties of lane lengths for PCIe specification 3.0".


Edit: added Youtube video link
Edit2: added Product Brief and Brochure

[ Edited by Andreas_Wolf 12.09.2013 - 03:31 ]

Mercury Computer Systems Announces Industry’s Highest Performing Power Architecture®-based OpenVPX Module

Rugged 24-core/48-thread Freescale® QorIQ™ AMP T4240-based OpenVPX building block with AltiVec® technology increases per-slot performance sixfold over previous generation designs

http://www.mc.com/presscenter/pressreleases/pressrelease.aspx?id=15240

Available in Q3

[ Editiert durch AltiVeced 09.02.2012 - 17:34 ]

@Andreas Wolf

Please someone say he didn't really divide 30 by 60 to come to his conclusion. Given my math isn't completely off I'd calculate 1-(1.3/1.6) and end up with a 20% relative power saving.

He probably did . In fact your math is correct and the precise relative power saving is 23%.

[ Edited by Krashan 10.02.2012 - 06:32 ]

@Andreas Wolf, Krashan:

In anycase, "performance" must be clearly defined, because power saving is a performance as well as computation speed.
I've first think that we can multiply them (1.6 * 0.7 = 1.12), that gives the global gain.
But If we think in term of energy cost only ("perf" / watts), it's Gperf / Gwatts. That's gives 1.6/1.3 ~= 1.23

[Edit] I've mabye found how he has obtained 50% : he computes the consumption relative to the "performances" (so the oposite of power saving at the same performances).

=> 1 - 0.7/1.6 ~= 0.56, a gain of 56% on the consumption relative to the performances.


Have fun with maths

[ Edited by Yomgui 10.02.2012 - 09:11 ]

> the precise relative power saving is 23%.

I still think it's 1-(1.3/1.6), which amounts to 18.75%, not 23%.

> "performance" must be clearly defined

I think it's obvious what "performance" means in this context.

> power saving is a performance as well as computation speed.

Relative power saving means how much power is proportionally saved in chip A compared to chip B when performances of both chips is scaled to the same value.

> I've first think that we can multiply them (1.6 * 0.7 = 1.12), that gives the global gain.
> But If we think in term of energy cost only ("perf" / watts), it's Gperf / Gwatts. That's
> gives 1.6/1.3 ~= 1.23

I'm afraid I don't understand your math.

> I've mabye found how he has obtained 50% : he computes the consumption
> relative to the "performances" (so the oposite of power saving at the same
> performances). => 1 - 0.7/1.6 ~= 0.56, a gain of 56% on the consumption relative
> to the performances.

He's a marketing guy, so I think my explanation of his miscalculation (30 divided by 60) fits his (lack of) math skills better than your explanation ;-)

@Andreas_Wolf:

>I'm afraid I don't understand your math.

It's also obvious this is how it can be computed:

if CPUA uses 1 watts for saying 1 computation "point", its computation power relatives is "1 points for 1 watts" (Perf/Power).

Now, you CPUB is 60% better on computation, for 30% of more power

Perf(CPUB) = 1.6 * Perf(CPUA)
Power(CPUB) = 1.3 * Power(CPUB)

=> Perf(CPUB) / Power(CPUB) = 1.6/1.3 * Perf(CPUA) / Power(CPUA)
=> your CPUB is 1.6/1.3 ~= 1.23 (23%) better than CPUA

And rest was a joke about "manipulating numbers to say whatever you want"... a common pratice in the marketing world ("have fun with maths"). Smile a bit...

> => Perf(CPUB) / Power(CPUB) = 1.6/1.3 * Perf(CPUA) / Power(CPUA)
> => your CPUB is 1.6/1.3 ~= 1.23 (23%) better than CPUA

I guess here you make the same mistake Krashan did. Let's imagine a CPU A with performance of "1" and power consumption of "1". Now let's compare that to a CPU B with performance of "4" and power consumption of "2". It's obvious that CPU B with quadruple the performance but only twice the power consumption has a relative power saving of 50% compared to CPU A, because at the same performance CPU B would have only half the power consumption of CPU A. Now see the calculations for the relative power saving:

Mine: 1-(2/4) = 0.5 = 50%
Yours and Krashan's: 4/2 = 2 = 200%

See the difference?

Freescale: station on chip delivers industry's highest performance

http://www.newelectronics.co.uk/electronics-news/freescale-station-on-chip-delivers-industrys-highest-performance/40534/

What are the chances that these chips will make it into consumer products that are mass produced? If they do get utilized in a mass produced consumer product, what are your estimates on how long it would take for companies to design and produce such products so they could be available in major electronics retail stores, 6 months, 12 months, or 18 months from 2nd Qtr 2012? (your best guesses of course)

Since computers for public consumption are no longer using this architecture (except for embedded market products and tiny niche markets), is there any chance that new (probably embedded) products might be produced that can be converted for use as a general purpose computer by people wanting to run MorphOS on such hardware?

If the price is low, perhaps the Chinese will choose to create something that is not tied to x86 & Windows and see the benefits of having a scalable architecture like this one, that can perhaps be used for low power/low cost user systems, yet scale up to workstation, or even super computer power.

How else can MorphOS users and developers obtain any new hardware with modern components which has been manufactured in mass quantities, if these new chips are not used in some product that could also be used as a MorphOS computer, unless we want to follow the path of A-Eon, and incur high design and manufacturing costs at low volumes. If these CPU's can be bought at less than $200, or better, less than $100, then perhaps a custom motherboard could be created using these new SOC's and a complete MorphOS computer system might be sold at a reasonable price.

Still I think the idea of creating new hardware for MorphOS is full of risk and possibility to increase it's cost above what would be a desirable maximum. We have already seen how difficult it is to have new custom hardware created, and that it can easily take much more time than first estimated.

I am not against the idea of new custom hardware, but only if it can be created at reasonable cost and with performance that is equal to, or surpasses the performance of the used G4 & G5 hardware that we already have available to us for porting to.

I would much rather see new hardware that is more power efficient using these new SOC's, than the power hungry G5 computers, but not at a cost of several times the cost to purchase said G5 systems, or if the performance would be similar to the current SAM boards.

We need performance equal to, or better than a 2.5GHz, or 2.7GHz G5, so we may play HD streaming video sources, or we need better drivers and/or codecs, which would allow HD playback using low power CPU's, like the Raspberry Pi accomplishes.

> Since computers for public consumption are no longer using this architecture
> (except for embedded market products and tiny niche markets), is there any
> chance that new (probably embedded) products might be produced that can
> be converted for use as a general purpose computer by people wanting to run
> MorphOS on such hardware?

Maybe this fresh initiative will amount to something:

http://media.freescale.com/phoenix.zhtml?c=196520&p=irol-newsArticle&ID=1663183

> If the price is low, perhaps the Chinese will choose to create something
> that is not tied to x86 & Windows and see the benefits of having a scalable
> architecture like this one, that can perhaps be used for low power/low cost
> user systems, yet scale up to workstation, or even super computer power.

The Chinese have already announced their own Power Architecture chips, so I guess for "low power/low cost user systems" they will rather use those than Freescale's chips.

Sorry, but these threads are utterly pointless and a waste of bandwidth. Neither the PPC as a whole, nor these CPU's in specific, will never mean anything positive for MorphOS. The only thing that could have a positive impact on MorphOS's future existence, development and user base, would be a migration to a better (and more importantly: truly mainstream) architecture like x86.

The sooner, the better. Start working on it as soon as 3.0 is released (if work hasn't already begun)...

@takemehomegrandma,

Not all MorphOS users share your opinion about the "Only" way forward, or only thing that could have a "positive" effect on the future of the existence of MorphOS.

It all depends on what the MorphOS Development Team wants to do with MorphOS, and what they want it to become. I don't think that anyone believes that MorphOS will become a competitor to Windows, MacOSX, or even Linux in the future.

Moving to x86, or any other "maintstream" architecture will not automatically solve anything for MorphOS users. It has advantages in cost of components and the speed/power available, but switching to x86, or any other "mainstream" architecture also has it's disadvantages as well. They have been discussed many times before, so I won't repeat them again here.

Only the MorphOS Dev. Team can decide what to do next and where they will try to lead the MorphOS users in the future. Or what they want MorphOS to become.

We will just have to wait and see what they announce next, but we are all free to express our personal preferences on which way we would like them to go, even you and your desire to have them move to x86, or some other "mainstream" architecture.

My personal preference is that they stay on their current course with used Mac G4 and then G5 computers for the next year or two. While that is happening, they can also keep an eye on the latest developments with the new FreeScale and Chinese PPC chips and systems, or development boards, to see if any of them are cost effective and have enough power, with a great power to cost ratio to make them an attractive alternative to the used G5 Mac computers, as a target for their next port of MorphOS3.x.

(Maybe I will repeat the reasons again)

Currently there is no MorphOS software that requires us to move to the latest and most powerful x86 hardware, so the only advantage of such a move is the cheap cost of x86 hardware and its widespread availability. If current high end G4 computers provide more than enough speed and power than is needed for 99% of the programs and tasks that MorphOS users need to use their MorphOS computers need to use them for, and if the available G5 Mac computer models could give us the added power we need to accomplish that last 1% that we can't currently do with the high end G4 systems, we need to look closely at the reasons for moving to x86 and what ways it would improve our MorphOS experience.

If we just want to be able to run Linux ports better, then we might as well just find a Linux distribution and tweak it a little to look more like MorphOS, integrate the WinUAE emulator and then rename it to MorphOS-x86, or M-OS, or some such nonsense just like Commodore USA are trying to do with their C-OS and x86 hardware in retro cases.

I think if you want MorphOS to move to x86, they might just as well have the entire MorphOS Development Team join the AROS team and turn AROS into the next MorphOS, by improving it with anything it is missing, that MorphOS already has implemented, and making progress of AROS move more quickly forward, since it will then have more talented programmers working on the combined AROS/MorphOS system.

The money that MorphOS Dev. Team currently makes from registration fees could easily be replaced with AROS bounties, so there would be little difference than how things are now, except that the responsibilities would be shared by more people and the control would also be shared, but I believe they could work out any organizational challenges that would be caused by a merging of MorphOS with AROS and it would be good for both.

Until then, I prefer that MorphOS stay as it is now, on PPC hardware, either used Mac's like they have been supporting, or if cost effective, possibly on custom, or embedded PPC hardware in the future. As long as they can provide the functionality that we all want & need when using the available PPC architecture, I see no reason to switch to any other architecture, just because everyone else has already done so.

Our challenge as a niche community is to figure out a way to get more software developed and more programmers interested. Not in what hardware we are going to use (unless switching to another hardware architecture will solve our problem by attracting more programmers, but since we have many programming languages and tools already that work on PPC MorphOS, I doubt that simply switching to x86 will instantly make any difference in the number of programmers we have in our ranks).

As a side note on programming, James Jacobs, aka Minuous, has already been able to fix many bugs in his own software that someone else had ported to MorphOS for him in the past, so there are new versions of several of his software projects available for download now. He will be making an announcement of these new releases very soon. This new work was made possible, because he now has his own G4 MacMini with the demo version of MorphOS2.7 installed on it, which I donated to him last month.

I am going to request from the MorphOS Dev. Team that James Jacobs receive a free (or at least reduced price) registered keyfile for MorphOS. If the Dev. Team declines my request, I will be asking members here to help fund the purchase of a MorphOS keyfile for him, as I am sure that this early work that he has been able to complete in porting his work to MorphOS is just the beginning of many more software projects that he will complete in the future for MorphOS and AmigaOS3.x, and maybe even AROS, specially AROS 68k (possibly OS4.x, but he has no way of testing code on any OS4.x hardware at this time).

[ Edited by amigadave 29.02.2012 - 16:11 ]

Update:

> "Availability of the royalty-free Mentor Embedded Performance Library for Freescale's
> AltiVec technology is planned to coincide with initial availability of QorIQ AMP silicon."
> http://media.freescale.com/phoenix.zhtml?c=196520&p=irol-newsArticle&ID=1603798
>
> "Library release date: Mid-summer 2012"
> http://go.mentor.com/x98s

Now reads:
"Library release date: Second-half 2012"


Edit:

Now reads:
"Library release date: Spring 2013"

[ Edited by Andreas_Wolf 25.01.2013 - 01:10 ]

takemehomegrandma,
Quote:

Your opinion, NOT fact.
Don't bother posting if you believe its a waste of time.
BTW - X86 would be a serious negative for me as I already have PPC equipment.
Looking forward to 3.0 and 3.1.

If the new chips are PPC, at least i hope they are more powerful than the ones in my washing machine...

> If the new chips are PPC, at least i hope they are more powerful than
> the ones in my washing machine...

That's the nice thing about PPC: it scales from washing machines all the way up to supercomputers :-) But pity is that it's missing some domains in between.